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path: root/src/include/cpu
AgeCommit message (Expand)Author
2014-01-16cpu/intel: Make all Intel CPUs load microcode from CBFSAlexandru Gagniuc
2014-01-15Re-declare CACHE_ROM_SIZE as aligned ROM_SIZE for MTRRKyösti Mälkki
2014-01-06cpu/cpu.h: Allow compiling with __SIMPLE_DEVICE__Vladimir Serbinenko
2013-12-26AMD boards (non-AGESA): Cleanup earlymtrr.c includesKyösti Mälkki
2013-12-21lynxpoint: Route all USB ports to XHCI in finalize stepDuncan Laurie
2013-12-13cpu: Rename CPU_MICROCODE_IN_CBFS to SUPPORT_CPU_UCODE_IN_CBFSAlexandru Gagniuc
2013-12-09AMD boards: Fix includes for microcode updatesKyösti Mälkki
2013-11-24smi: Update mainboard_smi_gpi() to have 32bit argumentDuncan Laurie
2013-10-13Rename cpu/x86/car.h to arch/early_variables.hStefan Reinauer
2013-09-21CBMEM: Always select CAR_MIGRATIONKyösti Mälkki
2013-08-15Include boot_cpu.c for romstage buildsKyösti Mälkki
2013-08-05AMD Kabini: Add CPU AGESA wrapper for new AMD processor familySiyuan Wang
2013-07-11include: Fix spellingMartin Roth
2013-06-03include/cpu/amd: Align `CPU_ID_EXT_FEATURES_MSR` with other definesPaul Menzel
2013-05-25Intel GM45, 945, SNB: Move `multiply_to_tsc()` to `tsc.h`Ronald G. Minnich
2013-05-16x86: add cache-as-ram migration optionAaron Durbin
2013-05-11Make early x86 POST codes written to IO port optionalMartin Roth
2013-05-10Get rid of a number of __GNUC__ checksStefan Reinauer
2013-05-10Drop prototype guarding for romccStefan Reinauer
2013-05-08x86: use asmlinkage macro for smm_handler_tAaron Durbin
2013-05-07x86: add TSC_CONSTANT_RATE optionAaron Durbin
2013-05-01x86: use boot state callbacks to disable rom cacheAaron Durbin
2013-04-12Revert "siemens/sitemp_g1p1: Make ACPI report the right mmconf region"Nico Huber
2013-04-10siemens/sitemp_g1p1: Make ACPI report the right mmconf regionPatrick Georgi
2013-04-05mtrr: add rom caching comment about hyperthreadsAaron Durbin
2013-04-04AMD: Drop six copies of wrmsr_amd and rdmsr_amdKyösti Mälkki
2013-04-03intel/microcode.h: Fix typo in comment: micr*o*codePaul Menzel
2013-04-01boot: add disable_cache_rom() functionAaron Durbin
2013-03-29x86: add rom cache variable MTRR index to tablesAaron Durbin
2013-03-29x86: mtrr: add CONFIG_CACHE_ROM supportAaron Durbin
2013-03-29x86: add new mtrr implementationAaron Durbin
2013-03-22x86: unify amd and non-amd MTRR routinesAaron Durbin
2013-03-22x86: Unify arch/io.h and arch/romcc_io.hStefan Reinauer
2013-03-21x86: protect against abi assumptions from compilerAaron Durbin
2013-03-19intel microcode: split up microcode loading stagesAaron Durbin
2013-03-15Google Link: Add remaining code to support native graphicsRonald G. Minnich
2013-03-15haswell: reserve default SMRAM spaceAaron Durbin
2013-03-14x86: SMM Module SupportAaron Durbin
2013-03-01GPLv2 notice: Unify all files to just use one space in »MA 02110-1301«Paul Menzel
2013-02-27smm: Update rev 0x30101 SMM revision save stateAaron Durbin
2013-02-18AMD Family12h: Fix warningsMartin Roth
2013-02-11Intel: Replace MSR 0xcd with MSR_FSB_FREQPatrick Georgi
2013-02-09speedstep: Deduplicate some MSR identifiersPatrick Georgi
2012-12-06Unify assembler function handlingStefan Reinauer
2012-11-20Unify use of bool config variablesStefan Reinauer
2012-11-14SMM: Avoid use of global variables in SMI handlerDuncan Laurie
2012-11-13Pass the CPU index as a parameter to startup.Ronald G. Minnich
2012-11-12Fix gcc-4.7 building problem.Han Shen
2012-11-05Overhaul speedstep codeNico Huber
2012-11-01Merge cpu/intel/acpi.h into cpu/intel/speedstep.hNico Huber
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