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path: root/src/include/cpu
AgeCommit message (Expand)Author
2018-11-23soc/intel/common: Bring DISPLAY_MTRRS into the lightNico Huber
2018-11-12src: Remove unneeded include "{arch,cpu}/cpu.h"Elyes HAOUAS
2018-11-08src: Replace common MSR addresses with macrosElyes HAOUAS
2018-11-07intel: Get rid of smm_get_pmbasePatrick Rudolph
2018-11-05cpu/amd: Use common AMD's MSRElyes HAOUAS
2018-11-05amd/mtrr: Fix IORR MTRRElyes HAOUAS
2018-11-01src: Add missing include <stdint.h>Elyes HAOUAS
2018-10-30src: Move shared amd64 and IA32 MSRs to <cpu/x86/msr.h>Elyes HAOUAS
2018-10-30{cpu,drivers,nb,sb}/amd: Replace {MSR,MTRR} addresses with macrosElyes HAOUAS
2018-10-30src: Add missing include <stdint.h>Elyes HAOUAS
2018-10-22intel: Use CF9 reset (part 2)Patrick Rudolph
2018-10-18cpu/amd: Use common AMD's MSRElyes HAOUAS
2018-10-11src: Move common IA-32 MSRs to <cpu/x86/msr.h>Elyes HAOUAS
2018-10-08Move compiler.h to commonlibNico Huber
2018-10-05src: Fix MSR_PKG_CST_CONFIG_CONTROL register nameElyes HAOUAS
2018-09-14complier.h: add __always_inline and use it in code baseAaron Durbin
2018-09-07amd/fam15: Add more MCA informationMarshall Dawson
2018-08-17src/include: add more msr definesMatt Delco
2018-08-08amd/fam15: Add MCA bank register definitionsMarshall Dawson
2018-08-08cpu/amd: Correct number of MCA banks clearedMarshall Dawson
2018-08-08cpu/amd: Rename MCA status registerMarshall Dawson
2018-07-30cpu/intel/smm/gen1: Use correct MSR for model_6fx and model_1067xArthur Heymans
2018-07-30cpu/intel/microcode: Add helper functions to get microcode infoRizwan Qureshi
2018-07-24cpu/x86/mtrr.h: Rename MSR SMRR_PHYS_x to IA32_SMRR_PHYSxArthur Heymans
2018-07-09src/{ec,include,lib}: Use "foo *bar" instead of "foo* bar"Elyes HAOUAS
2018-06-28smm: Add canary to end of stack and die() if a stack overflow occursRaul E Rangel
2018-06-14nb/intel/fsp_rangeley: Use MSR_PLATFORM_INFO instead of 0xceElyes HAOUAS
2018-06-05amd/geode_lx: Fix .c includesKyösti Mälkki
2018-06-04cpu/x86/mtrr.h: Clean up some guardsNico Huber
2018-06-02cpu/intel/car: Prepare for some POSTCAR_STAGE supportKyösti Mälkki
2018-05-31cpu/x86/mtrr: Prepare for ROM_SIZE > 16MiBNico Huber
2018-05-31cpu/x86/mtrr: Get rid of CACHE_ROM_SIZE_OVERRIDENico Huber
2018-05-31Remove AMD K8 cpu and northbridge supportKyösti Mälkki
2018-05-24AMD: Remove some leftover includesKyösti Mälkki
2018-05-19cpu/x86: Add support to run function on single APSubrata Banik
2018-05-14cpu/x86: Add support to run function with argument over APsSubrata Banik
2018-05-04cpu/x86/mp: remove unused functions and limit API exposureAaron Durbin
2018-05-03cpu/x86: Add infinite timeout support into run_ap_work() functionSubrata Banik
2018-04-26arch/x86: print cr2 value on every exceptionAaron Durbin
2018-04-26cpu/x86: add limited runtime identity page mappingAaron Durbin
2018-04-25arch/x86: add support for cache-as-ram pagingAaron Durbin
2018-04-23cpu/x86: add paging_set_default_pat() functionAaron Durbin
2018-04-23cpu/x86: expose and add paging helper functionsAaron Durbin
2018-04-23cpu/x86: move NXE and PAT accesses to paging moduleAaron Durbin
2018-04-05x86: Add function to modify CR3 registerNaresh G Solanki
2018-02-16x86/mtrr: Enable Rd/WrDram mod in AMD fixed MTRRsMarshall Dawson
2017-12-20include/cpu/x86: Add clflush inline functionMarshall Dawson
2017-12-11intel: Use MSR_EBC_FREQUENCY_ID instead of 0x2cElyes HAOUAS
2017-11-30intel: Replace msr(0x198) with msr(IA32_PERF_STATUS)Elyes HAOUAS
2017-11-02cpu/x86/mtrr: fix fls() and fms() inline assemblyAaron Durbin