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coreboot
2560p
820g2
autoport-hsw
broadwell_refcode
e6230
e7240_bdw
haswell-mrc
hp820g1
hp9480m
mec1322
Some coreboot project code with my work
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cpu
Age
Commit message (
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Author
2013-03-22
x86: Unify arch/io.h and arch/romcc_io.h
Stefan Reinauer
2013-03-21
x86: protect against abi assumptions from compiler
Aaron Durbin
2013-03-19
intel microcode: split up microcode loading stages
Aaron Durbin
2013-03-15
Google Link: Add remaining code to support native graphics
Ronald G. Minnich
2013-03-15
haswell: reserve default SMRAM space
Aaron Durbin
2013-03-14
x86: SMM Module Support
Aaron Durbin
2013-03-01
GPLv2 notice: Unify all files to just use one space in »MA 02110-1301«
Paul Menzel
2013-02-27
smm: Update rev 0x30101 SMM revision save state
Aaron Durbin
2013-02-18
AMD Family12h: Fix warnings
Martin Roth
2013-02-11
Intel: Replace MSR 0xcd with MSR_FSB_FREQ
Patrick Georgi
2013-02-09
speedstep: Deduplicate some MSR identifiers
Patrick Georgi
2012-12-06
Unify assembler function handling
Stefan Reinauer
2012-11-20
Unify use of bool config variables
Stefan Reinauer
2012-11-14
SMM: Avoid use of global variables in SMI handler
Duncan Laurie
2012-11-13
Pass the CPU index as a parameter to startup.
Ronald G. Minnich
2012-11-12
Fix gcc-4.7 building problem.
Han Shen
2012-11-05
Overhaul speedstep code
Nico Huber
2012-11-01
Merge cpu/intel/acpi.h into cpu/intel/speedstep.h
Nico Huber
2012-09-05
buildsystem: Make CPU microcode updating more configurable
Alexandru Gagniuc
2012-08-09
AMD northbridge: copy TOP_MEM and TOP_MEM2 for distribution
Kyösti Mälkki
2012-08-09
Synchronize rdtsc instructions
Stefan Reinauer
2012-08-07
Move cpus_ready_for_init() to AMD K8
Kyösti Mälkki
2012-07-31
Revert "Use broadcast SIPI to startup siblings"
Sven Schnelle
2012-07-25
SMM: rename tseg_fixup to tseg_relocate and export
Duncan Laurie
2012-07-24
SMM: Fix state save map for sandybridge and TSEG
Duncan Laurie
2012-07-24
Add code to read Intel microcode from CBFS
Vadim Bendebury
2012-07-04
Intel cpus: Extend cache to cover complete Flash Device
Kyösti Mälkki
2012-07-03
AGESA F15 wrapper for Trinity
zbao
2012-07-02
Use broadcast SIPI to startup siblings
Sven Schnelle
2012-07-02
Intel CPUs: execute microcode update only once per core
Kyösti Mälkki
2012-05-24
cbtypes.h: Unify cbtypes.h used in AMD board's code
Vikram Narayanan
2012-05-08
Clean up #ifs
Patrick Georgi
2012-04-27
SMM: unify mainboard APM command handlers
Stefan Reinauer
2012-04-27
cpu/cpu.h: add ROMCC guards
Stefan Reinauer
2012-04-26
Revamp Intel microcode update code
Stefan Reinauer
2012-04-25
Replace cache control magic numbers with symbols
Patrick Georgi
2012-04-06
Fixes and Sandybridge support for lapic cpu init
Stefan Reinauer
2012-04-04
Add support to run SMM handler in TSEG instead of ASEG
Stefan Reinauer
2012-04-03
Add support for Intel Turbo Boost feature
Stefan Reinauer
2012-03-30
Make MTRR min hole alignment 64MB
Duncan Laurie
2012-03-30
Add an option to keep the ROM cached after romstage
Stefan Reinauer
2012-03-29
Add infrastructure for global data in the CAR phase of boot
Gabe Black
2012-03-16
xchg is atomic with side-effects
Patrick Georgi
2012-03-08
Unify Local APIC address definitions
Patrick Georgi
2012-02-16
AGESA F15: AGESA family15 model 00-0fh cpu wrapper
Kerry Sheh
2012-01-10
MTRR: get physical address size from CPUID
Sven Schnelle
2011-11-01
remove trailing whitespace
Stefan Reinauer
2011-11-01
Remove XIP_ROM_BASE
Patrick Georgi
2011-10-28
Get rid of AUTO_XIP_ROM_BASE
Patrick Georgi
2011-09-15
Build warning fix for AMD Family 12
efdesign98
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