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path: root/src/include/cpu
AgeCommit message (Expand)Author
2014-10-17acpi_add_ssdt_pstates: Remove function.Vladimir Serbinenko
2014-08-30AMD Steppe Eagle: CPU files for new SoCBruce Griffith
2014-08-15intel/cpu: rename car.h to romstage.hAaron Durbin
2014-08-14Intel: Add common header file for CAR setupEdward O'Callaghan
2014-07-17drivers/spi: Sanitize headers from preprocessor abuseEdward O'Callaghan
2014-06-30x86 MTRR: Drop unused return valueKyösti Mälkki
2014-04-28AMD: Add common header file for CAR setupKyösti Mälkki
2014-04-16cpu/amd/agesa/family15tn: Add initial support for SMM modeAlexandru Gagniuc
2014-03-20rmodules: use rmodtool to create rmodulesAaron Durbin
2014-03-16Make POST device configurable.Idwer Vollering
2014-02-25Remove CACHE_ROM.Vladimir Serbinenko
2014-02-16x86: provide infrastructure to backup default SMM regionAaron Durbin
2014-02-11SMP: Add arch-agnostic boot_cpu()Kyösti Mälkki
2014-01-30x86: Add SMM helper functions to MP infrastructureAaron Durbin
2014-01-30x86: add SMM save state for 0x0100 revisionAaron Durbin
2014-01-30x86: parallel MP initializationAaron Durbin
2014-01-28x86: add common definitions for control registersAaron Durbin
2014-01-28x86/mtrr: don't assume size of ROM cached during CAR modeAaron Durbin
2014-01-28x86: include header to define types in useAaron Durbin
2014-01-23Multiboot: remove multiboot tables generation.Vladimir Serbinenko
2014-01-16cpu/intel: Make all Intel CPUs load microcode from CBFSAlexandru Gagniuc
2014-01-15Re-declare CACHE_ROM_SIZE as aligned ROM_SIZE for MTRRKyösti Mälkki
2014-01-06cpu/cpu.h: Allow compiling with __SIMPLE_DEVICE__Vladimir Serbinenko
2013-12-26AMD boards (non-AGESA): Cleanup earlymtrr.c includesKyösti Mälkki
2013-12-21lynxpoint: Route all USB ports to XHCI in finalize stepDuncan Laurie
2013-12-13cpu: Rename CPU_MICROCODE_IN_CBFS to SUPPORT_CPU_UCODE_IN_CBFSAlexandru Gagniuc
2013-12-09AMD boards: Fix includes for microcode updatesKyösti Mälkki
2013-11-24smi: Update mainboard_smi_gpi() to have 32bit argumentDuncan Laurie
2013-10-13Rename cpu/x86/car.h to arch/early_variables.hStefan Reinauer
2013-09-21CBMEM: Always select CAR_MIGRATIONKyösti Mälkki
2013-08-15Include boot_cpu.c for romstage buildsKyösti Mälkki
2013-08-05AMD Kabini: Add CPU AGESA wrapper for new AMD processor familySiyuan Wang
2013-07-11include: Fix spellingMartin Roth
2013-06-03include/cpu/amd: Align `CPU_ID_EXT_FEATURES_MSR` with other definesPaul Menzel
2013-05-25Intel GM45, 945, SNB: Move `multiply_to_tsc()` to `tsc.h`Ronald G. Minnich
2013-05-16x86: add cache-as-ram migration optionAaron Durbin
2013-05-11Make early x86 POST codes written to IO port optionalMartin Roth
2013-05-10Get rid of a number of __GNUC__ checksStefan Reinauer
2013-05-10Drop prototype guarding for romccStefan Reinauer
2013-05-08x86: use asmlinkage macro for smm_handler_tAaron Durbin
2013-05-07x86: add TSC_CONSTANT_RATE optionAaron Durbin
2013-05-01x86: use boot state callbacks to disable rom cacheAaron Durbin
2013-04-12Revert "siemens/sitemp_g1p1: Make ACPI report the right mmconf region"Nico Huber
2013-04-10siemens/sitemp_g1p1: Make ACPI report the right mmconf regionPatrick Georgi
2013-04-05mtrr: add rom caching comment about hyperthreadsAaron Durbin
2013-04-04AMD: Drop six copies of wrmsr_amd and rdmsr_amdKyösti Mälkki
2013-04-03intel/microcode.h: Fix typo in comment: micr*o*codePaul Menzel
2013-04-01boot: add disable_cache_rom() functionAaron Durbin
2013-03-29x86: add rom cache variable MTRR index to tablesAaron Durbin
2013-03-29x86: mtrr: add CONFIG_CACHE_ROM supportAaron Durbin
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