coreboot - Some coreboot project code with my work

Age	Commit message (Expand)	Author
2018-12-05	smmstore: make smmstore's SMM handler code follow everything else	Patrick Georgi
2018-12-05	elog: make elog's SMM handler code follow everything else	Patrick Georgi
2018-11-23	soc/intel/common: Bring DISPLAY_MTRRS into the light	Nico Huber
2018-11-12	src: Remove unneeded include "{arch,cpu}/cpu.h"	Elyes HAOUAS
2018-11-08	src: Replace common MSR addresses with macros	Elyes HAOUAS
2018-11-07	intel: Get rid of smm_get_pmbase	Patrick Rudolph
2018-11-05	cpu/amd: Use common AMD's MSR	Elyes HAOUAS
2018-11-05	amd/mtrr: Fix IORR MTRR	Elyes HAOUAS
2018-11-01	src: Add missing include <stdint.h>	Elyes HAOUAS
2018-10-30	src: Move shared amd64 and IA32 MSRs to <cpu/x86/msr.h>	Elyes HAOUAS
2018-10-30	{cpu,drivers,nb,sb}/amd: Replace {MSR,MTRR} addresses with macros	Elyes HAOUAS
2018-10-30	src: Add missing include <stdint.h>	Elyes HAOUAS
2018-10-22	intel: Use CF9 reset (part 2)	Patrick Rudolph
2018-10-18	cpu/amd: Use common AMD's MSR	Elyes HAOUAS
2018-10-11	src: Move common IA-32 MSRs to <cpu/x86/msr.h>	Elyes HAOUAS
2018-10-08	Move compiler.h to commonlib	Nico Huber
2018-10-05	src: Fix MSR_PKG_CST_CONFIG_CONTROL register name	Elyes HAOUAS
2018-09-14	complier.h: add __always_inline and use it in code base	Aaron Durbin
2018-09-07	amd/fam15: Add more MCA information	Marshall Dawson
2018-08-17	src/include: add more msr defines	Matt Delco
2018-08-08	amd/fam15: Add MCA bank register definitions	Marshall Dawson
2018-08-08	cpu/amd: Correct number of MCA banks cleared	Marshall Dawson
2018-08-08	cpu/amd: Rename MCA status register	Marshall Dawson
2018-07-30	cpu/intel/smm/gen1: Use correct MSR for model_6fx and model_1067x	Arthur Heymans
2018-07-30	cpu/intel/microcode: Add helper functions to get microcode info	Rizwan Qureshi
2018-07-24	cpu/x86/mtrr.h: Rename MSR SMRR_PHYS_x to IA32_SMRR_PHYSx	Arthur Heymans
2018-07-09	src/{ec,include,lib}: Use "foo bar" instead of "foo bar"	Elyes HAOUAS
2018-06-28	smm: Add canary to end of stack and die() if a stack overflow occurs	Raul E Rangel
2018-06-14	nb/intel/fsp_rangeley: Use MSR_PLATFORM_INFO instead of 0xce	Elyes HAOUAS
2018-06-05	amd/geode_lx: Fix .c includes	Kyösti Mälkki
2018-06-04	cpu/x86/mtrr.h: Clean up some guards	Nico Huber
2018-06-02	cpu/intel/car: Prepare for some POSTCAR_STAGE support	Kyösti Mälkki
2018-05-31	cpu/x86/mtrr: Prepare for ROM_SIZE > 16MiB	Nico Huber
2018-05-31	cpu/x86/mtrr: Get rid of CACHE_ROM_SIZE_OVERRIDE	Nico Huber
2018-05-31	Remove AMD K8 cpu and northbridge support	Kyösti Mälkki
2018-05-24	AMD: Remove some leftover includes	Kyösti Mälkki
2018-05-19	cpu/x86: Add support to run function on single AP	Subrata Banik
2018-05-14	cpu/x86: Add support to run function with argument over APs	Subrata Banik
2018-05-04	cpu/x86/mp: remove unused functions and limit API exposure	Aaron Durbin
2018-05-03	cpu/x86: Add infinite timeout support into run_ap_work() function	Subrata Banik
2018-04-26	arch/x86: print cr2 value on every exception	Aaron Durbin
2018-04-26	cpu/x86: add limited runtime identity page mapping	Aaron Durbin
2018-04-25	arch/x86: add support for cache-as-ram paging	Aaron Durbin
2018-04-23	cpu/x86: add paging_set_default_pat() function	Aaron Durbin
2018-04-23	cpu/x86: expose and add paging helper functions	Aaron Durbin
2018-04-23	cpu/x86: move NXE and PAT accesses to paging module	Aaron Durbin
2018-04-05	x86: Add function to modify CR3 register	Naresh G Solanki
2018-02-16	x86/mtrr: Enable Rd/WrDram mod in AMD fixed MTRRs	Marshall Dawson
2017-12-20	include/cpu/x86: Add clflush inline function	Marshall Dawson
2017-12-11	intel: Use MSR_EBC_FREQUENCY_ID instead of 0x2c	Elyes HAOUAS