| Age | Commit message (Expand) | Author |
|---|---|---|
| 2016-03-02 | nb/intel/sandybridge/romstage: Read fuse bits for max MEM Clk | Patrick Rudolph |
| 2016-02-20 | nb/intel/sandybridge/raminit: Add XMP support | Patrick Rudolph |
| 2016-01-18 | header files: Fix guard name comments to match guard names | Martin Roth |
| 2015-10-31 | tree: drop last paragraph of GPL copyright header | Patrick Georgi |
| 2015-07-12 | Change #ifdef and #if defined CONFIG_ bools to #if IS_ENABLED() | Martin Roth |
| 2015-06-22 | device: DDR3 generic code 64bit fix | Stefan Reinauer |
| 2014-12-07 | ddr3: Plumber DIMM type to parsed structure. | Vladimir Serbinenko |
| 2014-07-29 | sandy/ivybridge: Native raminit. | Vladimir Serbinenko |
| 2013-12-17 | device/dram/ddr3: Move CRC calculation in a separate function | Alexandru Gagniuc |
| 2013-07-11 | include: Fix spelling | Martin Roth |
| 2013-06-04 | DDR3: Add utilities for creating MRS commands | Alexandru Gagniuc |
| 2013-06-03 | dram: Add utilities for decoding DDR3 SPDs | Alexandru Gagniuc |
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index : coreboot | |
| Some coreboot project code with my work | vimacs |
| summaryrefslogtreecommitdiff |