index
:
coreboot
2560p
820g2
autoport-hsw
broadwell_refcode
e6230
e7240_bdw
haswell-mrc
hp820g1
hp9480m
mec1322
Some coreboot project code with my work
vimacs
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
src
/
include
/
device
/
pci_def.h
Age
Commit message (
Expand
)
Author
2015-04-10
PCI - Add interrupt disable bit definition
Lee Leahy
2015-03-23
PCIe: Add L1 Sub-State support.
Kenji Chen
2015-03-09
device/pciexp: Add support for PCIe CLK power management
Kane Chen
2014-05-25
Drop PCI_BDF macro declaration
Kyösti Mälkki
2014-02-10
usbdebug: Split PCI EHCI part
Kyösti Mälkki
2013-08-24
Add test to match struct device with pci_devfn_t
Kyösti Mälkki
2013-07-11
include: Fix spelling
Martin Roth
2012-03-29
Add support for enabling PCIe Common Clock and ASPM
Duncan Laurie
2010-04-27
Since some people disapprove of white space cleanups mixed in regular commits
Stefan Reinauer
2009-04-21
add define for Role-Based Error Reporting to PCIe defines (trivial)
Stefan Reinauer
2006-10-04
AMD Rev F support
Yinghai Lu
2005-07-08
eric patch
Yinghai Lu
2004-10-14
- Update the device header files
Eric Biederman
2004-03-11
- Moved hlt() to it's own header.
Eric Biederman
2003-07-21
- First pass at code for generic link width and size determination
Eric Biederman
2003-05-21
- Add pci_def.h so romcc compiled files can also get at the
Eric Biederman