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Some coreboot project code with my work
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spd.h
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Author
2016-07-12
SPD: Add CAS latency 2
Elyes HAOUAS
2016-06-24
SPD: Add DRAM devices types
Elyes HAOUAS
2016-06-24
SPD: fix and add DDR2 SDRAM memory module types
Elyes HAOUAS
2016-06-24
spd: Add module voltage for 1.8V
Elyes HAOUAS
2016-06-14
Added CL7 support
Elyes HAOUAS
2015-10-31
tree: drop last paragraph of GPL copyright header
Patrick Georgi
2015-05-21
Remove address from GPLv2 headers
Patrick Georgi
2015-03-27
smbios: add funtion for smbios type17
Kane Chen
2013-06-03
spd.h: Add all known SPD_MEMORY_TYPE definitions.
Alexandru Gagniuc
2013-03-01
GPLv2 notice: Unify all files to just use one space in »MA 02110-1301«
Paul Menzel
2010-11-20
Some more DIMM0 related cleanups and deduplication.
Uwe Hermann
2010-11-20
Unify DIMM SPD addressing. For Geode, change the
Patrick Georgi
2008-08-28
Add definitions for DDR2 SPD registers.
Ed Swierk
2008-08-01
add some SPD values from specs. (trivial)
Stefan Reinauer
2008-01-18
Please bear with me - another rename checkin. This qualifies as trivial, no
Stefan Reinauer
2007-11-03
This patch is some small changes to the vt8237r to prepare it for
Corey Osgood
2007-05-04
This patch adds support for the AMD Geode LX CPU. (rediffed)
Marc Jones
2006-11-22
Update of the src/include/spd.h file with the following improvements:
Uwe Hermann
2006-08-23
Uwe Hermann:
Stefan Reinauer
2005-10-05
Updating FSF address in the code.
Stefan Reinauer
2005-09-13
Initial revision.
Steven J. Magnani