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2013-02-19move uartmem_getbaseaddr() to generic uart headerDavid Hendricks
This moves uartmem_getbaseaddr() from an 8250-specific header to the generic uart header. This is to accomodate non-8250 memory-mapped UARTs. Change-Id: Id25e7dab12b33bdd928f2aa4611d720aa79f3dee Signed-off-by: David Hendricks <dhendrix@chromium.org> Reviewed-on: http://review.coreboot.org/2422 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2013-02-08armv7: Use same console initialization procedure for all ARM stagesHung-Te Lin
Use same console initialization procedure for all ARM stages (bootblock, romstage, and ramstage): #include <console/console.h> ... console_init() ... printk(level, format, ...) Verified to boot on armv7/snow with console messages in all stages. Change-Id: Idd689219035e67450ea133838a2ca02f8d74557e Signed-off-by: Hung-Te Lin <hungte@chromium.org> Signed-off-by: David Hendricks <dhendrix@chromium.org> Reviewed-on: http://review.coreboot.org/2301 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2013-02-08console: Only print romstage messages with EARLY_CONSOLE enabled.Hung-Te Lin
Revise console source file dependency (especially for EARLY_CONSOLE) and interpret printk/console_init according to EARLY_CONSOLE setting (no-ops if EARLY_CONSOLE is not defined). Verified to boot on x86/qemu and armv7/snow. Disabling EARLY_CONSOLE correctly stops romstage messages on x86/qemu (armv7/snow needs more changes to work). Change-Id: Idbbd3a26bc1135c9d3ae282aad486961fb60e0ea Signed-off-by: Hung-Te Lin <hungte@chromium.org> Reviewed-on: http://review.coreboot.org/2300 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: David Hendricks <dhendrix@chromium.org>
2013-02-05exynos: de-duplicate UART header contentDavid Hendricks
Some header content got duplicated during the initial porting effort. This moves generic UART header stuff to exynos5-common and leaves exynos5250 #defines in the AP-specific UART header. Change-Id: Ifb6289d7b9dc26c76ae4dfcf511590b3885715a3 Signed-off-by: David Hendricks <dhendrix@chromium.org> Reviewed-on: http://review.coreboot.org/2285 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2013-01-04make early serial console support more genericDavid Hendricks
This patch makes pre-RAM serial init more generic, particularly for platforms which do not necessarily need cache-as-RAM in order to use the serial console and do not have a standard 8250 serial port. This adds a Kconfig variable to set romstage-* for very early serial console init. The current method assumes that cache-as-RAM should enable this, so to maintain compatibility selecting CACHE_AS_RAM will also select EARLY_SERIAL_CONSOLE. The UART code structure needs some rework, but the use of ROMCC, romstage, and then ramstage makes things complex. uart.h now includes all .h files for all uarts. All 2 of them. This is actually a simplifying change. Change-Id: I089e7af633c227baf3c06c685f005e9d0e4b38ce Signed-off-by: David Hendricks <dhendrix@chromium.org> Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> Reviewed-on: http://review.coreboot.org/2086 Tested-by: build bot (Jenkins)
2012-12-08WIP: Add support for non-8250 built-in UARTsStefan Reinauer
Change-Id: I5b412678bb8993633b3a610315d298cb20c705f3 Signed-off-by: David Hendricks <dhendrix@chromium.org> Signed-off-by: Stefan Reinauer <reinauer@google.com> Reviewed-on: http://review.coreboot.org/2011 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>