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AgeCommit message (Expand)Author
2011-06-03Correct wrong PCI ID for VIA K8M890 Chrome.Alexandru Gagniuc
2011-05-15Cosmetic cleanup.Scott Duplichan
2011-05-15Enable AHCI mode and hide IDE controller to reduce boot time.Scott Duplichan
2011-05-10Change read_option() to a macro that wraps some API uglynessPatrick Georgi
2011-05-09Adds RS740 HT and internal graphics PCI ids.Ivaylo Valkov
2011-04-26Add support for memory mapped UARTs to coreboot and add the OXPCIe952 as anStefan Reinauer
2011-04-22The UART divider should be calculated based on the base frequencyStefan Reinauer
2011-04-21more ifdef -> if fixesStefan Reinauer
2011-04-21some ifdef --> if fixesStefan Reinauer
2011-04-20Simplify coreboot's console/console.hStefan Reinauer
2011-04-20pci1x2x: add PCI1510 device IDsSven Schnelle
2011-04-20drop dead uart init code.Stefan Reinauer
2011-04-11Unify use of post_codeAlexandru Gagniuc
2011-04-10In 2007 Adrian Reber suggested that we drop ASSEMBLY in favor of __ASSEMBLER__.Stefan Reinauer
2011-03-27Add AMD SR56x0 support.Zheng Bao
2011-03-01Fix a simple whitespace error in src/include/device/device.hSven Schnelle
2011-03-01Add subsystemid option to sconfigSven Schnelle
2011-02-16Extended K8T890 driver to include the K8T800 and K8M800 northbridgesAlexandru Gagniuc
2011-02-14I missed a file that was part of the AMD AGESA CPU wrapper checkin, r6347.Frank Vibrans
2011-02-03Wrap CONFIG_MAINBOARD_PCI_SUBSYSTEM_{VENDOR,DEVICE}_ID in weak functionsPatrick Georgi
2011-01-31Add PCI ID's for VIA K8T800 and K8M800 northbridges.Alexandru Gagniuc
2011-01-28This patch gets usbdebug console working in romstage.Stefan Reinauer
2011-01-19Revert r5902 to make code more readable again. At least three people like toStefan Reinauer
2011-01-19Now that the VIA code is run above 1Meg (like other boards), it shouldKevin O'Connor
2011-01-18Move option table (cmos.layout's binary representation)Patrick Georgi
2011-01-01Add AMD SB800 southbridge support via cimx_wrapper.Kerry She
2010-12-31Add RS785(RS880) support. Just few pci_ids.Zheng Bao
2010-12-29-Change the remaining GLIU1 port 5 register names from VIP (Video Input Port)Nils Jacobs
2010-12-26Replace Geode GX2 MSR addresses for GLCP on GLIU1 with namesNils Jacobs
2010-12-26Clean up Geode GX2 comments, whitespace and coding style. Trivial.Nils Jacobs
2010-12-18SMM for AMD K8 Part 1/2Stefan Reinauer
2010-12-17fix the tree again. Stefan Reinauer
2010-12-17drop one more version of doing serial uart output differently.Stefan Reinauer
2010-12-17guard against the case that CONFIG_WAIT_BEFORE_CPUS_INIT is not defined at all.Stefan Reinauer
2010-12-13Compile cbmem.c instead of including it in romstage,Rudolf Marek
2010-12-13We hardcode highmemory size in every northbridge! This is bad, and especiall...Rudolf Marek
2010-12-11Following patch makes just one fadt.c file. For SB700.Rudolf Marek
2010-12-11factor out cpu power management base into a separate file. And fix a bug inStefan Reinauer
2010-12-11After this has been brought up many times before, rename src/arch/i386 toStefan Reinauer
2010-12-08second round name simplification. drop the <component>_ prefix.stepan
2010-12-05W83627DHG/W83627EHG fixups for virtual LDNs.Uwe Hermann
2010-11-221) wraps the s3 parts of chipset code/memory init code with if CONFIG_HAVE_AC...Rudolf Marek
2010-11-22Printing coreboot debug messages on VGA console is pretty much useless, sinceStefan Reinauer
2010-11-20Some more DIMM0 related cleanups and deduplication.Uwe Hermann
2010-11-20Unify DIMM SPD addressing. For Geode, change thePatrick Georgi
2010-11-18For completeness sake: License header.Patrick Georgi
2010-11-17Move Intel power management related defines to some central location.Patrick Georgi
2010-11-13MTRR related improvements for AMD family 10h and family 0Fh systemsScott Duplichan
2010-11-11Add pci id and ops for VT8237A SATA controllerTobias Diedrich
2010-11-07This adds the VT8237A LPC device id and the pci_driver struct inTobias Diedrich
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