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2006-04-10added chipsetinit function, many defines. addec call to chipsetinit to Ronald G. Minnich
northbridge.c builds fine on lippert git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2250 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-10add cpureginit to romcc code.Ronald G. Minnich
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2249 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-10clean up gx2def.h a bit. Ronald G. Minnich
Add cpureginit.c added called to cpureginit to model_gx2_init.c git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2248 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-06add northbridgeinit, also add new constants.Ronald G. Minnich
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2244 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-06fix constants styleRonald G. Minnich
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2242 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-06add bug support for 2.1Ronald G. Minnich
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2239 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-03new cache_as_ram support Yinghai Lu
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2232 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-03-20fix conflichRonald G. Minnich
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2221 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-03-20resolve conflictLi-Ta Lo
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2219 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-03-20added definitions. added cpubug support. added object. Commented out Ronald G. Minnich
msr set in northbridge that conflicted with the cpubug support. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2218 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-03-20add a defineRonald G. Minnich
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2216 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-03-13correct __ROMCC__Li-Ta Lo
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2193 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-03-13failed attempt to do early init for cs5535. Almost there butLi-Ta Lo
still get garbage reading smbus. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2192 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-02-27more GX2 commitLi-Ta Lo
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2185 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-02-06add this fileRonald G. Minnich
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2171 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-01-28added GX2 idsRonald G. Minnich
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2167 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-12-041203_hcdn.diff: Stefan Reinauer
store every HT device unit id base and pass those info to acpi https://openbios.org/roundup/linuxbios/issue46 Note: This version drops the two scripts a and c and creates the dsdt on the fly from Config.lb using makerule git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2134 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-12-04small gcc4 patches, some ts5300 updatesStefan Reinauer
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2129 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-12-02backing out pci device renamesStefan Reinauer
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2119 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-12-021201_ht_bus0_dev0_fidvid_core.diffStefan Reinauer
https://openbios.org/roundup/linuxbios/issue41 Lord have mercy upon us. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2118 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-12-01Applying YhLu's patch from issue 37.Stefan Reinauer
a. apic id liftting to way that kernel like and let bsp to stay with 0 b. hw memhole: solve if hole_startk == some node basek This, together with the previous one will break most of the tree, but Yinghai Lu is really good at fixing things, so... git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2116 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-11-26- Apply 11_24_a_s1_core.diff fromStefan Reinauer
https://openbios.org/roundup/linuxbios/issue24 - fix up for via epia-m git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2110 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-11-24fix typos reported by Martin LeyStefan Reinauer
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2101 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-11-23added missing microcode.hLi-Ta Lo
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2098 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-11-22EPIA-M fixupRonald G. Minnich
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2090 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-11-14comment and unify lb_uint64 handling as discussed on the mailinglistStefan Reinauer
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2086 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-10-25- See Issue Tracker id-6 "lnxi-patch-6-replacement"Jason Schildt
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2070 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-10-25- See Issue Tracker id-4 "lnxi-patch-4" Jason Schildt
- In addition: modified apic_id lifting to always lift all CPUs. This may cause problems with older kernels. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2068 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-10-05Updating FSF address in the code.Stefan Reinauer
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2051 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-09-14Rename Intel 82801CA constants.Steven J. Magnani
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2037 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-09-14Initial revision.Steven J. Magnani
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2033 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-09-13Initial revision.Steven J. Magnani
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2027 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-09-12added include file for sc520Ronald G. Minnich
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2019 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-08-10Undoing all HDAMA commits from LNXI from r2005->2003Jason Schildt
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2006 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-08-09- Merge from linuxbios-lnxi (Linux Networx repository) up to public tree.Jason Schildt
- Special version for HDAMA rev G with 33Mhz test and reboot out. - Support for CPU rev E, dual core, memory hoisting, - corrected an SST flashing problem. Kernel bug work around (NUMA) - added a Kernel bug work around for assigning CPU's to memory. r2@gog: svnadmin | 2005-08-03 08:47:54 -0600 Create local LNXI branch r1110@gog: jschildt | 2005-08-09 10:35:51 -0600 - Merge from Tom Zimmerman's additions to the hdama code for dual core and 33Mhz fix. r1111@gog: jschildt | 2005-08-09 11:07:11 -0600 Stable Release tag for HDAMA-1.1.8.10 and HDAMA-1.1.8.10LANL r1112@gog: jschildt | 2005-08-09 15:09:32 -0600 - temporarily removing hdama tag to update to public repository. Will reset tag after update. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2004 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-08-08Fix up the VT8623 northbridge support.Jonathan McDowell
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2002 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-07-08eric patchYinghai Lu
1. x86_setup_mtrr take address bit. 2. generic ht, pcix, pcie beidge... 3. scan bus and reset_bus 4. ht read ctrl to decide if the ht chain is ready 5. Intel e7520 and e7525 support 6. new ich5r support 7. intel sb 6300 support. yhlu patch 1. split x86_setup_mtrrs to fixed and var 2. if (resource->flags & IORESOURCE_FIXED ) return; in device.c pick_largest_resource 3. in_conherent.c K8_SCAN_PCI_BUS git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1982 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-07-06Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-51arch import user (historical)
Creator: Yinghai Lu <yhlu@tyan.com> cache_as_ram for AMD and some intel git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1967 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-07-06Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-34arch import user (historical)
Creator: Yinghai Lu <yhlu@tyan.com> AMD D0/E0 Opteron new mem mapping support, AMD E Opteron mem hole support,AMD K8 Four Ranks DIMM support git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1950 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-07-06Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-30arch import user (historical)
Creator: Yinghai Lu <yhlu@tyan.com> Nvidia Ck804 support git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1946 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-07-06Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-29arch import user (historical)
Creator: Hamish Guthrie <hamish@prodigi.ch> Added NSC pc97317 super-io and added fill character option to config/Options.lb to speed up flash programming git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1945 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-07-06Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-10arch import user (historical)
Creator: Yinghai Lu <yhlu@tyan.com> pci_rom.h smbus device parent device print git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1929 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-07-06Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-4arch import user (historical)
Creator: Eric Biederman <ebiederman@lnxi.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1923 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-01-18class code reverseYinghai Lu
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1882 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-01-15add vga.h / needed by vga text console.Stefan Reinauer
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1876 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-01-13onboard pci_romYinghai Lu
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1865 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-01-13onboard pci_romYinghai Lu
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1860 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-01-10added PCI expansion ROM support,Li-Ta Lo
works for some ATI and Nvidia AGP cards now. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1851 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-12-27now rom_address is one of the resourcesLi-Ta Lo
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1834 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-12-10- Fix the definition of the linuxbios table so all of the compilersEric Biederman
will generate the struct lb_memory_range the same. - Add a few pci_ids. - Small readabiltiy clean ups to debug_dev git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1818 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1