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coreboot
2560p
820g2
autoport-hsw
broadwell_refcode
e6230
e7240_bdw
haswell-mrc
hp820g1
hp9480m
mec1322
Some coreboot project code with my work
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program.ld
Age
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Author
2020-03-17
src (minus soc and mainboard): Remove copyright notices
Patrick Georgi
2019-09-14
src/: Replace some __PRE_RAM__ use
Kyösti Mälkki
2019-08-26
arch/x86: Simplify <arch/early_variables.h>
Kyösti Mälkki
2019-08-26
Move and rename ARCH_STAGE_HAS_xxx_SECTION rules
Kyösti Mälkki
2019-03-08
coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX)
Julius Werner
2018-05-22
Introduce bootblock self-decompression
Julius Werner
2017-07-30
lib/program.ld: Guard .id section placement
Nico Huber
2016-10-31
lib/program.ld: add .sdata sections
Aaron Durbin
2016-09-19
arch/x86,lib: make cbmem console work in postcar stage
Aaron Durbin
2016-05-21
program.ld: Don't exclude sbe region from verstage
Stefan Reinauer
2016-04-30
lib/reg_script: Allow multiple independent handlers
Lee Leahy
2016-04-16
program.ld: make sure that zeroptr isn't assigned to debug sections
Patrick Georgi
2016-03-23
arch/x86: introduce postcar stage/phase
Aaron Durbin
2016-01-28
Provide a gcc-safe zero pointer
Patrick Georgi
2015-10-31
tree: drop last paragraph of GPL copyright header
Patrick Georgi
2015-09-28
program.ld: terminate ALIGN statement
Patrick Georgi
2015-09-22
linking: link bootblock.elf with .data and .bss sections again
Aaron Durbin
2015-09-17
linking: Repair special treatments for non-x86 bootblocks
Julius Werner
2015-09-09
x86: link ramstage the same way regardless of RELOCATABLE_RAMSTAGE
Aaron Durbin
2015-09-09
rmodule: use program.ld for linking
Aaron Durbin
2015-09-09
x86: link romstage like the other architectures
Aaron Durbin
2015-09-09
linking: lay the groundwork for a unified linking approach
Aaron Durbin