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2019-11-21soc/intel/fsp_baytrail: Drop supportArthur Heymans
Relocatable ramstage, postcar stage and C_ENVIRONMENT_BOOTBLOCK are now mandatory features, which this platform lacks. Change-Id: I0b0344f1ebed12207a77c985f27893a1353c0925 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/36982 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr> Reviewed-by: David Hendricks <david.hendricks@gmail.com>
2019-11-20cbfs: switch to region_device for location APIsAaron Durbin
Drop struct cbfs_props and replace with struct region_device object. The goal of the cbfs locator APIs are to determine the correct region device to find the cbfs files. Therefore, start directly using struct region_device in the cbfs location paths. Update the users of the API and leverage the default boot region device implementation for apollolake. Change-Id: I0158a095cc64c9900d8738f8ffd45ae4040575ea Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/36939 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
2019-11-20security/vboot: Remove buffer_size from struct vboot_working_dataYu-Ping Wu
Since buffer_size is no longer used, remove it from struct vboot_working_data. BRANCH=none BUG=chromium:1021452 TEST=emerge-kukui coreboot Change-Id: Ie770e89b4a45e0ec703d5bbb8fb6a298ce915056 Signed-off-by: Yu-Ping Wu <yupingso@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/36844 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
2019-11-19lib/fmap: Disable pre-RAM cache for FSP 1.0Julius Werner
Due to the way CAR teardown is handled in FSP 1.0, the results of car_get_var_ptr() aren't always reliable, which can break things when running with FMAP cache. It might be possible to fix this but would make the code rather complicated, so let's just disable the feature on these platforms and hope they die out soon. Also allow this option to be used by platforms that don't have space for the cache and want to save a little more code. Change-Id: I7ffb1b8b08a7ca3fe8d53dc827e2c8521da064c7 Signed-off-by: Julius Werner <jwerner@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/36937 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Werner Zeh <werner.zeh@siemens.com> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2019-11-18include: Make stdbool.h a separate fileJulius Werner
This patch moves the traditional POSIX stdbool.h definitions out from stdint.h into their own file. This helps for using these definitions in commonlib code which may be compiled in different environments. For coreboot everything should chain-include this stuff via types.h anyway so nothing should change. Change-Id: Ic8d52be80b64d8e9564f3aee8975cb25e4c187f5 Signed-off-by: Julius Werner <jwerner@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/36837 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2019-11-15cbfs: remove prepare() callback from struct cbfs_locatorAaron Durbin
The prepare() callback is no longer utilized in the code. Remove the callback and support for it. Change-Id: Ic438e5a80850a3df619dbbfdecb522a9dc2c1949 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/36690 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Frans Hendriks <fhendriks@eltan.com> Reviewed-by: Julius Werner <jwerner@chromium.org> Reviewed-by: Wim Vervoorn <wvervoorn@eltan.com>
2019-11-15security/vboot: Remove flags from struct vboot_working_dataYu-Ping Wu
Since now we have persistent context, the usage of the flags can be replaced with vb2_context.flags. BRANCH=none BUG=chromium:1021452 TEST=emerge-kukui coreboot Change-Id: I8e5757a8cc09712c3acde9cbaab910b7498681b4 Signed-off-by: Yu-Ping Wu <yupingso@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/36808 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
2019-11-14cbfs: Stop checking master headerJulius Werner
The CBFS master header is a legacy structure that just conveys the same information we already have from the FMAP these days. We're still including it to support older CBFS implementations in some payloads, but there's no need for coreboot itself to follow this indirection anymore. This patch simplifies the default CBFS locator to just return the CBFS offset and size from the FMAP directly. Change-Id: I6b00dd7f276364d62fa1f637efbaee0e80607c49 Signed-off-by: Julius Werner <jwerner@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/36688 Reviewed-by: Wim Vervoorn <wvervoorn@eltan.com> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-11-14lib/fmap: Add optional pre-RAM cacheJulius Werner
This patch adds an optional pre-RAM cache for the FMAP which most platforms should be able to use, complementing the recently added post-RAM FMAP cache in CBMEM. vboot systems currently read the FMAP about half a dozen times from flash in verstage, which will all be coalesced into a single read with this patch. It will also help future vboot improvements since when FMAP reads become "free" vboot doesn't need to keep track of so much information separately. In order to make sure we have a single, well-defined point where the new cache is first initialized, eliminate the build-time hardcoding of the CBFS section offsets, so that all CBFS accesses explicitly read the FMAP. Add FMAP_CACHEs to all platforms that can afford it (other than the RISC-V things where I have no idea how they work), trying to take the space from things that look like they were oversized anyway (pre-RAM consoles and CBFS caches). Change-Id: I2820436776ef620bdc4481b5cd4b6957764248ea Signed-off-by: Julius Werner <jwerner@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/36657 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Joel Kitching <kitching@google.com>
2019-11-14cbfs: Make cbfs_master_header_props() externally availableJulius Werner
This patch makes the CBFS default locator .locate() callback externally available so that code which overrides cbfs_master_header_locator can reuse or wrap it and doesn't have to copy&paste the whole thing. Use it for the Eltan vendorcode implementation which previously did this. Change-Id: I54dad5c8ea64ea0fc472217e275daa815736991e Signed-off-by: Julius Werner <jwerner@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/36797 Reviewed-by: Wim Vervoorn <wvervoorn@eltan.com> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-11-12lib/bootmem: Correct error messageWim Vervoorn
bootmem_allocate_buffer() displayed "unitialized", this is changed to "uninitialized". BUG=N/A TEST=build Change-Id: I84ae689ddb24f3e3d2387735faf3850e6bd6dfa9 Signed-off-by: Wim Vervoorn <wvervoorn@eltan.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/36772 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Frans Hendriks <fhendriks@eltan.com> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2019-11-11console,boot_state: Exclude printk() from reported timesKyösti Mälkki
Use monotonic timer to accumulate the time spent in console code. For bootblock and romstage, only stage total is reported. For ramstage each boot_state is reported individually. Change-Id: Id3998bab553ff803a93257a3f2c7bfea44c31729 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/36574 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Nico Huber <nico.h@gmx.de>
2019-11-11region: add rdev_chain_full()Aaron Durbin
Instead of open coding an offset of 0 and querying the size of a region device provide a rdev_chain_full() helper function that does that for the caller. For the existing users that match this pattern convert them to using rdev_chain_full(). Change-Id: Ie316790a8a5b16a7f7e22f86f58bd2e633c19450 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/36683 Reviewed-by: Julius Werner <jwerner@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-11-10lib/cbmem: Remove the cbmem_top_init() hookArthur Heymans
This hook is unused and with the need for initializing storage to share cbmem_top over other stages gone, there is likely no future need for this. Change-Id: I4ba9daea61b6d7b8949bbd2c4fb71d0a0fa20d93 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/36369 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Michael Niewöhner Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2019-11-10lib/Kconfig: Remove RAMSTAGE_CBMEM_TOP_ARGArthur Heymans
All targets now have the _cbmem_top_ptr symbol populated via calling arguments or in the nvidia/tegra210 case worked around by populating it with cbmem_top_chipset explicitly at the start of ramstage, so the Kconfig guarding this behavior can be removed. Change-Id: Ie7467629e58700e4d29f6e735840c22ed687f880 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/36422 Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Michael Niewöhner Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-11-07lib/cbfs: Add fallback to RO region to cbfs_boot_locateWim Vervoorn
With this change cbfs_boot_locate will check the RO (COREBOOT) region if a file can not be found in the active RW region. By doing so it is not required to duplicate static files that are not intended to be updated to the RW regions. The coreboot image can still be updated by adding the file to the RW region. This change is intended to support VBOOT on systems with a small flash device. BUG=N/A TEST=tested on facebook fbg1701 Change-Id: I81ceaf927280cef9a3f09621c796c451e9115211 Signed-off-by: Wim Vervoorn <wvervoorn@eltan.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/36545 Reviewed-by: Frans Hendriks <fhendriks@eltan.com> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-11-06lib: add calculate crc byte by byteXiang Wang
Change-Id: I5cab1f90452b08a464ad7a2d7e75d97187452992 Signed-off-by: Xiang Wang <merle@hardenedlinux.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/36624 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2019-11-05security/vboot: Removed vboot_prepare from vboot_locatorWim Vervoorn
When prog_locate() is called in the stage VBOOT is starting from and the image to be loaded is not the target image vboot_prepare() may be called too early. To prevent this vboot_prepare() is removed from the vboot_locator structure. This allows more control over the start of the vboot logic. To clarify the change the vboot_prepare() has been renamed to vboot_run_logic() and calls to initialize vboot have been added at the following places: postcar_loader: when VBOOT starts in ROMSTAGE romstage_loader: when VBOOT starts in BOOTBLOCK ramstage_loader: when VBOOT starts in ROMSTAGE BUG=N/A TEST=tested on facebook fbg1701 Change-Id: Id5e8fd78458c09dd3896bfd142bd49c2c3d686df Signed-off-by: Wim Vervoorn <wvervoorn@eltan.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/36543 Reviewed-by: Frans Hendriks <fhendriks@eltan.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-11-05bootblock: Add TS_START_BOOTBLOCK and TS_END_BOOTBLOCKKyösti Mälkki
Change-Id: I5617e5d9b7238ad7a894934910a3eae742d2d22d Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/36594 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-11-04cbfs: read header offset as explicitly LEMarty E. Plummer
le32_to_cpu spits out uint32_t on BE targets, cast it. Change-Id: Idc99b0c133faa2aa15d06f998e7371d332ffa490 Signed-off-by: Marty E. Plummer <hanetzer@startmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/36346 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
2019-11-03boot_state: Reduce precision of reported timesKyösti Mälkki
When diffing boot logs, lines reporting times spent in each boot_state always get highlighed due the little fluctuation in microsecond-scale. Reduce the logged precision to milliseconds to avoid that. Change-Id: I7a27d6c250d8432131f30e9a4869cb45ad75d9fd Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/36528 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2019-11-01lib/cbmem_top: Add a common cbmem_top implementationArthur Heymans
This adds a common cbmem_top implementation to all coreboot target. In romstage a static variable will be used to cache the result of cbmem_top_romstage. In ramstage if CONFIG_RAMSTAGE_CBMEM_TOP_ARG is set a global variable needs to be populated by the stage entry with the value passed via the calling arguments. if CONFIG_RAMSTAGE_CBMEM_TOP_ARG is not set the same implementation as will be used as in romstage. Change-Id: Ie767542ee25483acc9a56785ce20a885e9a63098 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/36273 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
2019-11-01lib/uuid: Add UUID parsing functionNico Huber
Implement a simple function that parses a canonical UUID string into the common byte representation. Inspired by acpigen_write_uuid(). Change-Id: Ia1bd883c740873699814fde6c6ddc1937a40093e Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/36297 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2019-10-30Program loading: Handoff cbmem_top via calling argumentsArthur Heymans
There are a lot of different implementations to pass information from romstage to ramstage. These could all be unified by passing this information via cbmem. Often however these methods exist for that very purpose. This solves this by passing cbmem_top via the programs arguments. Change-Id: Id2031f7bb81ce65fc318313c270eb1fbae3b2114 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/36272 Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-10-28lib/cbfs: Don't load XIP stages from bootblockArthur Heymans
This should improve boot times as it skips unnecessary read and writes. Change-Id: I8cf36613903783e741b2e3bfeeee5bc29ab26d5b Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/36323 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2019-10-28lib/prog_loaders.c: Add prog_locate_hook()Frans Hendriks
There is no posibility to prevent loading images from cbfs at this stage For security features prog_locate_hook() is added. This hook can be used to prevent loading the image. BUG=N/A TEST=Created verified binary and verify logging on Facebook FBG-1701 Change-Id: I12207fc8f2e9ca45d048cf8c8d9c057f53e5c2c7 Signed-off-by: Frans Hendriks <fhendriks@eltan.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/30811 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2019-10-27src/[arch-lib]: change "unsigned" to "unsigned int"Martin Roth
Signed-off-by: Martin Roth <martin@coreboot.org> Change-Id: Ibb7b48a7a144421aff29acbb7ac30968ae5fe5ab Reviewed-on: https://review.coreboot.org/c/coreboot/+/36329 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Rudolph <siro@das-labor.org>
2019-10-27src: Use 'include <boot/coreboot_tables.h>' when appropriateElyes HAOUAS
Change-Id: I3d90e46ed391ce323436750c866a0afc3879e2e6 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/36359 Reviewed-by: Martin Roth <martinroth@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-09-27fmap: Add get_fmap_flash_offset()Furquan Shaikh
CB:35377 changed the behavior of find_fmap_directory() to return pointer to CBMEM_ID_FMAP if fmap is cached in cbmem. lb_boot_media_params() calls find_fmap_directory to add offset of fmap in flash to coreboot table. However, because of the change in behavior of find_fmap_directory(), it ended up adding 0 as the offset. This change adds a new function get_fmap_flash_offset() which returns the offset of fmap in flash. Ideally, all payloads should move to using the FMAP from CBMEM. However, in order to maintain compatibility with payloads which are not updated, ensure that fmap_offset is updated correctly. Since find_fmap_directory() is no longer used outside fmap.c, this change also removes it from fmap.h and limits scope to fmap.c. In a follow up patch, we need to push a change to libpayload to expose the fmap cache pointer to lib_sysinfo. BUG=b:141723751 Change-Id: I7ff6e8199143d1a992a83d7de1e3b44813b733f4 Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/35639 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Rudolph <siro@das-labor.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Shelley Chen <shchen@google.com>
2019-09-27lib/bootsplash: Fix compilationPatrick Rudolph
Add missing include. Tested on Supermicro X11SSH-TF. Change-Id: Id0c80ac646001a497e96cae4d48a0f09762eb936 Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/35613 Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-by: Patrick Georgi <pgeorgi@google.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-09-23lib/fmap: Cache FMAP in cbmemPatrick Rudolph
For platform independend exposure of FMAP through a kernel module cache the FMAP in CBMEM. In addition add a pointer in coreboot tables pointing to the introduced CBMEM area. To not waste the allocated DRAM, use the cached CBMEM in RAM enabled stages if possible. Tested on qemu using https://github.com/9elements/linux/commits/google_firmware_fmap2 Tested on QEMU and Supermicro X11SSH-TF. Change-Id: I4e01c573c3edfa34dbba5fe7604d4f6e18b584d5 Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/35377 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-by: Julius Werner <jwerner@chromium.org>
2019-09-15lib/coreboot_table: Show splashscreen in lb_table_initJohanna Schander
Every vga init implementation needs to cache the framebuffer state to be able to fill the lb_framebuffer struct later on in the fill_lb_framebuffer call. Showing the bootsplash afterwards guarantees to have the same interface into all the vga drivers. This is by far from ideal, as it only allows for a single driver at compile-time and should be adapted in the future. It was tested on the wip razer blade stealth using vgabios @ 1280x1024 and also in Qemu @ 1280x1024. By default the qemu framebuffer will be initialized in 800x600@32. This can be overwriten by configuration by setting CONFIG_DRIVERS_EMULATION_QEMU_BOCHS_{X,Y}RES . Change-Id: I4bec06d22423627e8f429c4b47e0dc9920f1464e Signed-off-by: Johanna Schander <coreboot@mimoja.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/34599 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
2019-09-14src/: Replace some __PRE_RAM__ useKyösti Mälkki
Change-Id: Iaa56e7b98aad33eeb876edd7465c56c80fd1ac18 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/35398 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2019-09-14arch/x86: Remove acpi_fail_wakeup() and cbmem_fail_resume()Kyösti Mälkki
Unused since commit d46b8d5. Change-Id: If0f1e0381dd7698f842dc1288ff222a4d5d4783c Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/35389 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Furquan Shaikh <furquan@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-09-13timestamps: Remove TIMESTAMP_CACHE_IN_BSSKyösti Mälkki
This was implemented for LATE_CBMEM_INIT support which has already been deprecated. Change-Id: I39225ba675bc3389e051e15b400a905431969715 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/35375 Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-09-13timestamps: Further simplify timestamp_reinit()Kyösti Mälkki
Allocation of new table always happens in romstage. Change-Id: I089a84b372893fb3018a796fb1e16cd58753bdf4 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/35374 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Furquan Shaikh <furquan@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-09-12timestamps: Mostly remove struct timestamp_cacheKyösti Mälkki
Change-Id: Ifcd75630e562af302312f93bdf180aa90f18d21d Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/35290 Reviewed-by: Julius Werner <jwerner@chromium.org> Reviewed-by: Werner Zeh <werner.zeh@siemens.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-09-12timestamps: Refactor CBMEM hookKyösti Mälkki
Separate timestamp_sync_cache_to_cbmem() as it is only used with ENV_ROMSTAGE. Change-Id: Ibe18a5ecf09b2b87d8ee3e828728ad6a8a262206 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/35280 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Julius Werner <jwerner@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-09-11timestamps: Improve collection for ENV_ROMSTAGE_OR_BEFOREKyösti Mälkki
Keep track of the active timestamp table location using a CAR_GLOBAL variable. Done this way, the entire table can be located outside _car_relocatable_data and we only switch the pointer to CBMEM and copy the data before CAR gets torn down. Fix comments about requirements of timestamp_init() usage. Remove timestamp_cache from postcar and ramstage, as CBMEM is available early on. Change-Id: I87370f62db23318069b6fd56ba0d1171d619cb8a Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/35032 Reviewed-by: Werner Zeh <werner.zeh@siemens.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-09-09arch/x86: Refactor CAR_GLOBAL quirk for FSP1.0Kyösti Mälkki
These platforms return to romstage from FSP only after already having torn CAR down. A copy of the entire CAR region is available and discoverable via HOB. Previously, CBMEM console detected on-the-fly that CAR migration had happened and relocated cbmem_console_p accoringlin with car_sync_var(). However, if the CAR_GLOBAL pointing to another object inside CAR is a relative offset instead, we have a more generic solution that can be used with timestamps code as well. Change-Id: Ica877b47e68d56189e9d998b5630019d4328a419 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/35140 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-09-09lib/spd_bin: Extend DDR4 spd informationEric Lai
From DDR4 SPD spec: Byte 4 (0x004): SDRAM Density and Banks Bits [7, 6]: 00 = 0 (no bank groups) 01 = 1 (2 bank groups) 10 = 2 (4 bank groups) 11 = reserved Bit [5, 4] : 00 = 2 (4 banks) 01 = 3 (8 banks) All others reserved Separate DDR3 and DDR4 banks. And extened capmb, rows, cols and ranks. Separate DDR3 and DDR4 ORGANIZATION/BUS_DEV_WIDTH offset. Signed-off-by: Eric Lai <ericr_lai@compal.corp-partner.google.com> Change-Id: I5f56975ce73d8ed2d4de7d9fd08e5ae86993e731 Reviewed-on: https://review.coreboot.org/c/coreboot/+/35206 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
2019-08-26arch/x86: Simplify <arch/early_variables.h>Kyösti Mälkki
This enables the use of .bss section for ENV_BOOTBLOCK and ENV_VERSTAGE even with CAR_GLOBAL_MIGRATION=y. In practice, boards with CAR_GLOBAL_MIGRATION=y currently build with romcc-bootblock so they will not be using .bss. Change-Id: Ie9dc14f3e528d3e4f48304f4d7de50df448a8af6 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/35016 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
2019-08-26lib/bootblock: Add simplified entry with basetimeKyösti Mälkki
This allows for minor optimization as num_timestamps becomes a constant zero for a function with local scope. The loop with calls to timestamp_add() gets removed from bootblock. Change-Id: Id230075c0e76fe377b6ea8c8ddf8318e07d29b91 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/34972 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
2019-08-26Split MAYBE_STATIC to _BSS and _NONZERO variantsKyösti Mälkki
These are required to cover the absensce of .data and .bss sections in some programs, most notably ARCH_X86 in execute-in-place with cache-as-ram. Change-Id: I80485ebac94b88c5864a949b17ad1dccdfda6a40 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/35003 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
2019-08-26Move and rename ARCH_STAGE_HAS_xxx_SECTION rulesKyösti Mälkki
Currently only x86 requires special handling here, for simplicity avoid introducing <arch/rules.h> and deal with this directly in <rules.h>. For consistency prefixes are changed from ARCH_ to ENV_. Change-Id: I95a56dbad3482202f6cc03043589bebfb13c39af Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/35014 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
2019-08-26lib: ramdetect: Register exception handlers for ARMv8Asami Doi
Register exception handlers to avoid a Synchronous External Abort that is raised when you try to access a non-memory address on ARMv8. An exception handler can jump over the faulting instruction. This is the feature only for QEMU/AArch64. Signed-off-by: Asami Doi <d0iasm.pub@gmail.com> Change-Id: I09a306ca307ba4027d9758c3debc2e7c844c66b8 Reviewed-on: https://review.coreboot.org/c/coreboot/+/34774 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org>
2019-08-23lib: hardwaremain: Call exception_init() as soon as possibleAsami Doi
Call exception_init() before calling cbmem_initialize() because ARMv8 on QEMU uses an exception handler to detect a ram size. Signed-off-by: Asami Doi <d0iasm.pub@gmail.com> Change-Id: If010234a6576414e7e174c075b599a4aa4c19eab Reviewed-on: https://review.coreboot.org/c/coreboot/+/35022 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org> Reviewed-by: Julius Werner <jwerner@chromium.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
2019-08-22ACPI S3: Depend on RELOCATABLE_RAMSTAGEKyösti Mälkki
With RELOCATABLE_RAMSTAGE, S3 resume path only uses memory that is reserved from OS. So there is no need for low memory backup and recovery. Change-Id: If7f83711685ac445abf4cd1aa6b66c3391e0e554 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/26834 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2019-08-21lib/bootsplash: Log bootsplash dimensions and framebuffer dimensionsJohanna Schander
The bootsplash.jpg needs to match the framebuffer resolution. Configuration errors are more visible if they can be compared easily. Changed message to be always printed: "Setting up bootsplash in ${FRAMEBUFFER_RESOLUTION}" Added message: "Bootsplash image resolution: ${IMAGE_RESOLUTION}" Change-Id: Ib4a06d53c0134b99d3e9e6d3eda9fa30fca9ef7d Signed-off-by: Johanna Schander <coreboot@mimoja.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/34598 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-08-15lib: edid: Move manufacturer name from private extra to public infoHung-Te Lin
When debugging usually we want to print out a full identifier for panel, that should be manufacturer and part number. Previously the edid only contains ascii_string (which is usually the part number) but we should export manufacturer name as well. Change-Id: I0020fdd5b9f9331b25825876e0de4dc7e26b0464 Signed-off-by: Hung-Te Lin <hungte@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/34852 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
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