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coreboot
2560p
820g2
autoport-hsw
broadwell_refcode
e6230
e7240_bdw
haswell-mrc
hp820g1
hp9480m
mec1322
Some coreboot project code with my work
vimacs
summary
refs
log
tree
commit
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path:
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src
/
mainboard
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amd
/
inagua
/
buildOpts.c
Age
Commit message (
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Author
2016-08-14
src/mainboard: Capitalize ROM, RAM, CPU and APIC
Elyes HAOUAS
2016-07-31
Remove extra newlines from the end of all coreboot files.
Martin Roth
2016-06-04
AGESA boards: Split dispatcher to romstage and ramstage
Kyösti Mälkki
2016-05-10
AGESA boards: Relocate platform memory config
Kyösti Mälkki
2015-10-31
tree: drop last paragraph of GPL copyright header
Patrick Georgi
2015-06-08
Remove empty lines at end of file
Elyes HAOUAS
2015-05-21
Remove address from GPLv2 headers
Patrick Georgi
2015-05-10
AGESA: Drop unused AGESA_MEM_TABLE
Kyösti Mälkki
2015-01-06
Remove AMD's "Release Content" doxygen from coreboot files
Martin Roth
2014-07-18
mainboard: Make use of ARRAY_SIZE in buildOpts.c on AGESA platforms
Edward O'Callaghan
2014-06-14
mainboard/amd: De-ASCIIartify reference boards
Edward O'Callaghan
2013-03-01
GPLv2 notice: Unify all files to just use one space in »MA 02110-1301«
Paul Menzel
2013-02-26
AMD Inagua: buildOpts.c: Adapt whitespace to coding style
Paul Menzel
2012-02-07
Inagua: Indent and wihtespace cleanup
Kerry Sheh
2012-02-07
Inagua: Synchronize AMD/inagua mainboard.
Kerry Sheh
2011-11-01
remove trailing whitespace
Stefan Reinauer
2011-02-14
Add IBASE DB-FT1 and AMD Inagua motherboards. Patch 8 of 8.
Frank Vibrans