coreboot - Some coreboot project code with my work

Age	Commit message (Expand)	Author
2014-07-03	AGESA boards: Use acpi_s3_resume_allowed()	Kyösti Mälkki
2014-07-03	AGESA boards: Add prepare_for_resume()	Kyösti Mälkki
2014-06-25	Declare acpi_is_wakeup_early() only once	Kyösti Mälkki
2014-05-13	southbridge/amd/sb?00/lpc.c: Move i8254/i8259 down in southbridge	Edward O'Callaghan
2014-04-28	AMD: Add common header file for CAR setup	Kyösti Mälkki
2014-04-26	superio/fintek/*: Factor out generic romstage component	Edward O'Callaghan
2014-03-31	superio/fintek/f81865f: Avoid .c includes	Edward O'Callaghan
2014-01-15	Re-declare CACHE_ROM_SIZE as aligned ROM_SIZE for MTRR	Kyösti Mälkki
2013-08-15	Include boot_cpu.c for romstage builds	Kyösti Mälkki
2013-05-08	copy_and_run: drop boot_complete parameter	Stefan Reinauer
2013-04-20	AMD SB800 based boards: Use `#include <sb_cimx.h>` instead of `"sb_cimx.h"`	Paul Menzel
2013-03-22	x86: Unify arch/io.h and arch/romcc_io.h	Stefan Reinauer
2013-03-01	GPLv2 notice: Unify all files to just use one space in »MA 02110-1301«	Paul Menzel
2012-05-08	Clean up #ifs	Patrick Georgi
2012-04-27	Move top level pc80 directory to drivers/	Stefan Reinauer
2012-04-16	S3 code in the mainboard.	zbao
2012-01-18	Clean up AMD romstage.c serial output	Marc Jones
2011-11-08	Cleanup Persimmon mainboard whitespace.	Marc Jones
2011-09-16	Persimmon updates for AMD F14 rev C0	efdesign98
2011-09-07	AMD F14 southbridge update	Kerry She
2011-07-14	Move AMD SB800 early clock setup.	Scott Duplichan
2011-06-20	sb800: move spi prefetch and fast read mode to sb bootblock.	Stefan Reinauer
2011-05-20	Correct amd persimmon romstage code for early SPI prefetch enable.	Scott Duplichan
2011-05-15	Enable rom cache early to reduce boot time.	Scott Duplichan
2011-05-15	Enable SPI cacheline prefetch early to reduce boot time.	Scott Duplichan
2011-05-15	Enable SPI cacheline prefetch early to reduce boot time.	Scott Duplichan
2011-05-15	Switch processor cores to pstate 0 early to reduce boot time.	Scott Duplichan
2011-05-15	Enable 33 MHz fast mode SPI read early to reduce boot time.	Scott Duplichan
2011-04-20	run uart_init() from console_init, just like the other console initialization...	Stefan Reinauer
2011-02-14	Add IBASE DB-FT1 and AMD Inagua motherboards. Patch 8 of 8.	Frank Vibrans