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coreboot
2560p
820g2
autoport-hsw
broadwell_refcode
e6230
e7240_bdw
haswell-mrc
hp820g1
hp9480m
mec1322
Some coreboot project code with my work
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path:
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src
/
mainboard
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amd
/
torpedo
/
buildOpts.c
Age
Commit message (
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Author
2016-08-14
src/mainboard: Capitalize ROM, RAM, CPU and APIC
Elyes HAOUAS
2016-07-31
Remove extra newlines from the end of all coreboot files.
Martin Roth
2016-06-04
AGESA boards: Split dispatcher to romstage and ramstage
Kyösti Mälkki
2016-06-04
AGESA f12 f15: Add OEM customisation
Kyösti Mälkki
2015-10-31
tree: drop last paragraph of GPL copyright header
Patrick Georgi
2015-06-08
Remove empty lines at end of file
Elyes HAOUAS
2015-05-21
Remove address from GPLv2 headers
Patrick Georgi
2015-05-10
AGESA: Drop unused AGESA_MEM_TABLE
Kyösti Mälkki
2015-01-06
Remove AMD's "Release Content" doxygen from coreboot files
Martin Roth
2014-07-24
src/mainboard: Remove trailing whitespace
Elyes HAOUAS
2014-07-18
mainboard: Make use of ARRAY_SIZE in buildOpts.c on AGESA platforms
Edward O'Callaghan
2014-07-08
mainboard: Trivial - drop trailing blank lines at EOF
Edward O'Callaghan
2013-03-01
GPLv2 notice: Unify all files to just use one space in »MA 02110-1301«
Paul Menzel
2011-11-01
remove trailing whitespace
Stefan Reinauer
2011-06-28
Add the AMD Torpedo mainboard
efdesign98