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2016-12-06cpu/x86/msr.h: Drop excessive includesKyösti Mälkki
Change-Id: Ic22beaa47476d8c600e4081fc5ad7bc171e0f903 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/17735 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2016-12-05mainboard & southbridge: Clear files that are just headersMartin Roth
These headers & comments indicating a lack of functionality don't help anything. We discourage copyrights and licenses on empty files, so just clear these. Change-Id: Id2ab060a2726cac6ab047d49a6e6b153f52ffe6d Signed-off-by: Martin Roth <martinroth@google.com> Reviewed-on: https://review.coreboot.org/17657 Tested-by: build bot (Jenkins) Reviewed-by: Nico Huber <nico.h@gmx.de>
2016-12-01AMD binaryPI: Switch to MMCONF_SUPPORT_DEFAULTKyösti Mälkki
Vendorcode always does PCI MMCONF access once it is enabled via MSR. In coreboot proper, we don't give opportunity to make pci_read/write calls before PCI MMCONF is enabled via MSR. This happens early in romstage amd_initmmio() for all cores. Change-Id: Id6ec25706b52441259e7dc1582f9a4ce8b154083 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/17534 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2016-12-01AGESA: Switch to MMCONF_SUPPORT_DEFAULTKyösti Mälkki
Vendorcode always does PCI MMCONF access once it is enabled via MSR. In coreboot proper, we don't give opportunity to make pci_read/write calls before PCI MMCONF is enabled via MSR. This happens early in romstage amd_initmmio() for all cores. Change-Id: If31bc0a67b480bcc1d955632f413f5cdeec51a54 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/17533 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2016-12-01AGESA f14: Consolidate early P-states settingKyösti Mälkki
Change-Id: I3feed296b6ff9908e783c1221a8f61d9c548fef4 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/17564 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2016-12-01AGESA f14: Consolidate XIP cacheKyösti Mälkki
Do this like fam15tn to reduce code duplication. Change-Id: I064fd27b85be7fb0c9d6918a84fc6f9b17065534 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/17563 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2016-10-24mainboard/amd/tilapia_fam10: Use C89 comments style & remove commented codeElyes HAOUAS
Change-Id: I7515288190ca57a321fb8ffe57a1181b638c336a Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/16978 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
2016-10-24mainboard/amd/serengeti_cheetah*: Use C89 comments style & remove commented codeElyes HAOUAS
Change-Id: I2fae9e02e2fccaff97f2441fd17f8960e8ab9786 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/16975 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
2016-10-24mainboard/amd/mahogany: Use C89 comments style & remove commented codeElyes HAOUAS
Change-Id: Ife9c0b8a1ab55fe683c88e34239d7f5806e1ff9b Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/16971 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
2016-10-24mainboard/amd/lamar: Use C89 comments style & remove commented codeElyes HAOUAS
Change-Id: I765814450b82755f84c010f63bc8f919bb0cd4c1 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/16970 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
2016-10-21mainboard/amd/db-ft3b-lc: Use C89 comments style & remove commented codeElyes HAOUAS
Change-Id: I2a3bf53e6bc4084305238fa176ae46161da4be8f Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/16967 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
2016-10-21mainboard/amd/bimini_fam10: Use C89 comments style & remove commented codeElyes HAOUAS
Change-Id: I4e628cbe11da32d291c4b8e4c7be91e9b0a86ad9 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/16966 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
2016-10-21mainboard/amd/bettong: Use C89 comments style & remove commented codeElyes HAOUAS
Change-Id: I137b27ffb0e54a9ca6b0bd3a454b1d99b3e1c22b Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/16907 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
2016-10-07src/mainboard: Remove whitespace after sizeofElyes HAOUAS
Change-Id: Ie2a047d35e69182812c349daedc5b3b5fde20122 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/16860 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Martin Roth <martinroth@google.com>
2016-10-07src/mainboard: Remove unnecessary whitespaceElyes HAOUAS
Change-Id: I35cb7e08d5233aa5a3dbb4631ab2ee4dc9596f98 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/16849 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
2016-10-04mainboard/amd/torpedo: Improve code formattingElyes HAOUAS
Change-Id: I18de4740e0d3512ec81e10b32d13d07a35791b57 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/16846 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
2016-10-04src/mainboard: Remove unnecessary semicolonElyes HAOUAS
Change-Id: Iab0c7c470a3105b5df7b6b74aebdd1329e7f93ba Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/16859 Tested-by: build bot (Jenkins) Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
2016-10-01mainboard/amd/serengeti_cheetah: Use tabs for indentsElyes HAOUAS
Change-Id: If47f0c072399fe8291bd8e41920d828f649ec49f Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/16817 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2016-10-01mainboard/*/*/*/usb.asl: Use tabs for indentsElyes HAOUAS
Change-Id: Id46a0c4ca59dc7224c2eedd674ea3a5486509de1 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/16824 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
2016-09-28mainboard/amd/rumba: Use tabs for indentsElyes HAOUAS
Change-Id: I005e607faa2a6c527584ba9cdcad92f4517a15e6 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/16778 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2016-09-26mainboard/*/*/dsdt.asl: Use tabs for indentsElyes HAOUAS
Change-Id: Idef587d8261784e916e8d50f4336cbcfca39b9b0 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/16730 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2016-09-26mainboard/*/*/mptable.c: Improve code formattingElyes HAOUAS
Change-Id: I341293cd334d6d465636db7e81400230d61bc693 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/16723 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2016-09-26mainboard/*/*/irq_tables.c: Use tabs for indentsElyes HAOUAS
Change-Id: Idc29373cb01f4304d22ae315812bd40f0aaa94c9 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/16729 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2016-09-20src/mainboard/a-trend - emulation: Add space around operatorsElyes HAOUAS
Change-Id: Ib00a9b2feb723d46642d86b2706728bbca7dd68d Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/16616 Reviewed-by: Patrick Georgi <pgeorgi@google.com> Tested-by: build bot (Jenkins)
2016-08-23src/mainboard: Remove unnecessary whitespace before "\n"Elyes HAOUAS
Change-Id: I9789b0b3339435fbe30c69221826bf23c9b3c77b Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/16283 Tested-by: build bot (Jenkins) Reviewed-by: Omar Pakker Reviewed-by: Martin Roth <martinroth@google.com>
2016-08-17mainboard: Clean up boot_option/reboot_bits in cmos.layoutNico Huber
Since commit 3bfd7cc (drivers/pc80: Rework normal / fallback selector code) the reboot counter stored in `reboot_bits` isn't reset on a reboot with `boot_option = 1` any more. Hence, with SKIP_MAX_REBOOT_CNT_CLEAR enabled, later stages (e.g. payload, OS) have to clear the counter too, when they want to switch to normal boot. So change the bits to (h)ex instead of (r)eserved. To clarify their meaning, rename `reboot_bits` to `reboot_counter`. Also remove all occurences of the obsolete `last_boot` bit that have sneaked in again since 24391321 (mainboard: Remove last_boot NVRAM option). Change-Id: Ib3fc38115ce951b75374e0d1347798b23db7243c Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/16157 Tested-by: build bot (Jenkins) Reviewed-by: Timothy Pearson <tpearson@raptorengineering.com> Reviewed-by: York Yang <york.yang@intel.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2016-08-14src/mainboard: Capitalize ROM, RAM, CPU and APICElyes HAOUAS
Change-Id: Ia1f24d328a065a54975adde067df36c5751bff2d Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/15987 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
2016-07-31mainboard: Format irq_tables.cPaul Menzel
Run the command below to format the files `irq_tables.c` of (mostly AMD) mainboards correctly with GNU indent 2.2.10. ``` $ git grep -l 'if (sum != pirq->checksum) {' | xargs indent -l ``` Fix up the following two checkpatch.pl errors manually. ``` ERROR: that open brace { should be on the previous line #1219: FILE: src/mainboard/gigabyte/ga_2761gxdk/irq_tables.c:129: + uint8_t reg[8] = + { 0x41, 0x42, 0x43, 0x44, 0x60, 0x61, 0x62, 0x63 }; ERROR: that open brace { should be on the previous line #1221: FILE: src/mainboard/gigabyte/ga_2761gxdk/irq_tables.c:131: + uint8_t irq[8] = + { 0x0A, 0X0B, 0X0, 0X0a, 0X0B, 0X05, 0X0, 0X07 }; ``` This is needed, so that follow-up commits, fixing checkpatch.pl errors and warnings, won’t run into conflicts with the git commit hooks, when for example, spaces instead of tabs are used for indentation. Change-Id: If254723f3013377fb3b9b08dd5eca6b76730ec4a Signed-off-by: Paul Menzel <pmenzel@molgen.mpg.de> Reviewed-on: https://review.coreboot.org/15932 Tested-by: build bot (Jenkins) Reviewed-by: Jonathan A. Kollasch <jakllsch@kollasch.net> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2016-07-31Remove extra newlines from the end of all coreboot files.Martin Roth
This removes the newlines from all files found by the new int-015-final-newlines script. Change-Id: I65b6d5b403fe3fa30b7ac11958cc0f9880704ed7 Signed-off-by: Martin Roth <martinroth@google.com> Reviewed-on: https://review.coreboot.org/15975 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2016-07-20amd/db-ft3b-lc: Add board supportKyösti Mälkki
Change-Id: Ibab9039306730bfd3063b34cf085e854e4608902 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/14970 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Martin Roth <martinroth@google.com> Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@googlemail.com>
2016-07-20amd/db-ft3b-lc: Copy of amd/olivehillplusKyösti Mälkki
Change-Id: I70330278bae54392e236d762716ba7c4d39a05a6 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/14969 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Martin Roth <martinroth@google.com>
2016-07-17mainboard/amd: add support for F2950 system boardAndrey Korolyov
F2950 SBC, also known as TONK 1201/TONK 1202, was originally produced as a Centerm F2950 using DB800 reference design. Common configuration does include a 600 MHz GeodeLX CPU underclocked to 500 or 400 MHz, 128 or 512 MiB of RAM in the single SODIMM slot and 128 or 512 MB IDE DOM. The board does have three USB 2.0 ports (none of them possessing debug capabilities), PS/2, VGA, Geode audio in/out and the serial port. EEPROM needs to be soldered out and flashed externally at the time of this message because flashrom would neither be able to dump BIOS correctly while running vendor BIOS nor write flash contents. All peripherals were tested against Linux 3.16 and seem to work flawlessly. At the moment of this commit coreboot does not pass PCI_COMMAND_IO from the configuration space to SeaBIOS, thereby preventing VGA OPROM from being executed. This would be fixed in the SeaBIOS itself or in a subsequent commit. As a workaround, user may put VGA OPROM to vgaroms/seavgabios.bin in CBFS. Signed-off-by: Andrey Korolyov <andrey@xdel.ru> Change-Id: I93f13ecb53bd05abc0e07e0bd7ba40e646dcb4c4 Reviewed-on: https://review.coreboot.org/15565 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2016-07-12Documentation: Fix doxygen errorsMartin Roth
Change-Id: I195fd3a9c7fc07c35913342d2041e1ffef110466 Signed-off-by: Martin Roth <martinroth@google.com> Reviewed-on: https://review.coreboot.org/15549 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2016-07-02amd/olivehillplus: Fix PCIe lane number comments.Derek Waldner
Correct the GPP PCIe lane number comments so that they match the code. Change-Id: If27c6a55ebedb0927dd9e8c7c9a833194e129a25 Signed-off-by: Derek Waldner <derek.waldner.os@gmail.com> Reviewed-on: https://review.coreboot.org/15095 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Martin Roth <martinroth@google.com>
2016-06-18AMD boards: Fix romstage main() declarationKyösti Mälkki
Boards incorrectly used intel include file for AMD board. Change-Id: I6d3172d1aa5c91c989a6ef63066a7cd6f70013f5 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/15232 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2016-06-04AGESA boards: Split dispatcher to romstage and ramstageKyösti Mälkki
The way dispatcher table is set up prevents linker from optimizing unused code away, we currently have raminit in ramstage. Optimize this manually by configuring AGESA_ENTRY booleans for romstage and ramstage separately. This will remove references in FuncParamsInfo and DispatchTable -arrays. All boards now include multi-core dispatcher, it has minimal footprint: AGESA_ENTRY_LATE_RUN_AP_TASK ACPI S3 support depends on HAVE_ACPI_RESUME being enabled: AGESA_ENTRY_INIT_RESUME AGESA_ENTRY_INIT_LATE_RESTORE AGESA_ENTRY_INIT_S3SAVE Disabled for all boards as it was not used: AGESA_ENTRY_INIT_GENERAL_SERVICES Change-Id: I7ec36a5819a8e526cbeb87b04dce4227a1689285 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/14417 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
2016-06-04AGESA f12 f15: Add OEM customisationKyösti Mälkki
Follow-up on commits a5d72a3 and 53052fe for f12 and f15. OEM Hooks are not BiosCallOuts. Change-Id: Iab22b0d73282a5a1a5d1344397b4430c0ebb81b5 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/14888 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
2016-06-03AMD boards: Drop comment on include fileKyösti Mälkki
The included file does not declare pm_ioread(), and the modified file does not call it either. Change-Id: I9723caf1062db23b4a3648e07c2dc4c02f862619 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/14968 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
2016-06-03AGESA boards: Drop unused includeKyösti Mälkki
These files do not use definitions from OptionsIds.h. Also those definitions are required and already included for Ids.h. Change-Id: I149fcfe2ad72fe3d7390ee2043a86432aeae3f08 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/14980 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
2016-05-10AGESA boards: Relocate platform memory configKyösti Mälkki
File buildOpts.c is a can of worms, pull platform memory configuration in to OemCustomize.c. This array should be assigned at runtime instead of linking a modified defaults table. Change-Id: I73d9d3fbc165e6c10472e105576d7c40820eaa6a Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/14528 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2016-05-10AGESA boards: Rename files containing OEM configurationKyösti Mälkki
There are other things besides PCIe port configuration that require board specific hooks. Change-Id: I0923651487b9ed5f6f7569ce08e02d993fa5f976 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/14527 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2016-04-21mainboard/amd: add license headersNoah Glovsky
Change-Id: Ida8e81c88b2016d90cc8305edfb199143f859ec2 Signed-off-by: Noah Glovsky <noah.glovsky@watershedschool.org> Reviewed-on: https://review.coreboot.org/14422 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
2016-04-20AMD CIMX: Drop unused codeKyösti Mälkki
We never define B1_IMAGE or B2_IMAGE. These are about building CIMx as separate binary modules, while coreboot builds these into same romstage or ramstage module. Change-Id: I9cfa3f0bff8332aff4b661d56d0e7b340a992992 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/14393 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-by: Kerry Sheh <shekairui@gmail.com>
2016-03-08Kconfig: Remove unneeded UDELAY_IO redeclarationStefan Reinauer
UDELAY_IO is defined in src/cpu/x86/Kconfig, so it does not need to be redefined in the AMD cpu or board Kconfigs. Change-Id: I6676881c0ba5d1634230fc3d3c37da3afbc6fceb Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-on: https://review.coreboot.org/13780 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
2016-03-05amd/thatcher: Removed #include early_serial.c from romstageAntonello Dettori
Remove dependency on early_serial.c and instead use the Super I/O's header to access the functions needed. Change-Id: I9edf7fc2501aa832106dda9213e702dbcc1200b4 Signed-off-by: Antonello Dettori <dev@dettori.io> Reviewed-on: https://review.coreboot.org/13887 Reviewed-by: Martin Roth <martinroth@google.com> Tested-by: build bot (Jenkins)
2016-02-09ASL: Use temporary variable when storing register into itself.Vladimir Serbinenko
Otherwise it triggers a IASL warning with new IASL. Change-Id: I090ee18df78ea779137ee6797c55b96ea27e6d27 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: https://review.coreboot.org/13623 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
2016-02-09ASL: Fix HPBA shadowing.Vladimir Serbinenko
Store (HPBA, HPBA) had no effect. Rename one of HPBA to avoid shadowing. Change-Id: I54bfa7bcb3e05c28fe8a257825af56527dbf663e Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: https://review.coreboot.org/13622 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
2016-02-09ASL: Remove unused local variables.Vladimir Serbinenko
Change-Id: Ifcbb6916b718d41fb9cda537ffdc3e652e13cbbf Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: https://review.coreboot.org/13620 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
2016-02-02src: Fix various spelling and whitespace issues.Martin Roth
This fixes some spelling and whitespace issues that I came across while working on various things in the tree. There are no functional changes. Change-Id: I33bc77282f2f94a1fc5f1bc713e44f72db20c1ab Signed-off-by: Martin Roth <martinroth@google.com> Reviewed-on: https://review.coreboot.org/13016 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2016-01-13tree: drop last paragraph of GPL copyright header from new filesMartin Roth
This continues what was done in commit a73b93157f2 (tree: drop last paragraph of GPL copyright header) Change-Id: Ifb8d2d13f7787657445817bdde8dc15df375e173 Signed-off-by: Martin Roth <martinroth@google.com> Reviewed-on: https://review.coreboot.org/12914 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
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