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2009-08-13Fix some conflicting types of variablesPatrick Georgi
Remove the normal/* files from the image. they're just copies of fallback/* anyway. Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4541 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-08-12Remove duplicate file, adjust Makefile to use the original copy.Patrick Georgi
Keeping identical files around will only bite us eventually, when they get out of sync. See coreboot-v2 history for examples. Trivial and build tested. Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Patrick Georgi <patrick.georgi@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4539 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-08-12Fix multiple missing files and errors from the recent commit. This happenedRonald G. Minnich
when Patrick's tree and mine got out of sync. Link stage still fails. Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4536 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-08-12Kconfig!Patrick Georgi
Works on Kontron, qemu, and serengeti. Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> tested on abuild only. Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4534 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-08-11Enable CBFS everywhere. All boards compiled for me (abuild tested),Patrick Georgi
and we will fix issues as they appear. Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4531 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-07-22Fix up the tree again...Stefan Reinauer
* acpi_add_table requires a pointer to the RSDP, not the RSDT anymore, in order to properly support XSDT generation. * fix compilation the DSDT on gigabyte/m57sli * drop a remaining, forgotten HPET_NAME for "HPET" Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4461 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-07-21This fixes a couple of issues with older Linux kernels (that expect an XSDT asStefan Reinauer
soon as there's an ACPI 2.0 or later table) * add XSDT support * add more table types This patch will break at least the kontron (and possibly some new boards I missed) Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4453 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-06-30the tool chain settings should not be in renamed (as they will never live inStefan Reinauer
Kconfig) Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4384 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-06-30This patch unifies the use of config options in v2 to all start with CONFIG_Stefan Reinauer
It's basically done with the following script and some manual fixup: VARS=`grep ^define src/config/Options.lb | cut -f2 -d\ | grep -v ^CONFIG | grep -v ^COREBOOT |grep -v ^CC` for VAR in $VARS; do find . -name .svn -prune -o -type f -exec perl -pi -e "s/(^|[^0-9a-zA-Z_]+)$VAR($|[^0-9a-zA-Z_]+)/\1CONFIG_$VAR\2/g" {} \; done Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4381 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-06-19Undo my ugly commit that added uses clauses in lots of places instead of one.Myles Watson
Fix configuration of all boards. (Abuild tested) Hopefully fix compilation of PPC boards (they've never compiled for me.) Apologize profusely. Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4367 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-06-17Fix configuration of boards that didn't have uses CONFIG_USE_INIT. Trivial.Myles Watson
Abuild tested with -C. Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4360 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-06-06When I started refactoring mainboard Config.lb, I added two differentCarl-Daniel Hailfinger
files for targets without failover: src/config/nofailovercalculation.lb (64 kB XIP) src/config/nofailovercalculation128.lb (128 kB XIP) Targets with other XIP sizes were ignored. This patch moves XIP size back into mainboard code. Benefits from this patch: - src/config/nofailovercalculation128.lb is no longer needed - Targets with XIP sizes besides 64k and 128k benefit from refactoring - Conceptually, this makes the include files pure calculation files without settings. Abuild tested. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Patrick Georgi <patrick.georgi@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4348 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-06-04The point of the patch is to make it easier to understand the raminitMyles Watson
code, specifically the difference between pre_f and f code. The only functional changes are in printk statements. The rest is white space. 1. Remove some #if 0 and #if 1 blocks 2. Remove #if USE_DCACHE_RAM blocks. All K8 boards use CAR. 2. Correct typos (canidate -> candidate) 3. Try to minimize the differences between amdk8_f.h and amdk8_pre_f.h 4. Try to minimize the differences between raminit.c and raminit_f.c 5. Make boards that have rev_f processors include the correct raminit code There is much more that could be done, but it's a start. Abuild tested and boot tested on s2892 and serengeti_cheetah. Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4337 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-06-03Revert "CMOS: Add set_option and rework get_option."Luc Verhaegen
This reverts commit eb7bb49eb5b48c39baf7a256b7c74e23e3da5660. Stepan pointed out that "s" means string, which makes the following statement in this commit message invalid: "Since we either have reserved space (which we shouldn't do anything with in these two functions), an enum or a hexadecimal value, unsigned int seemed like the way to go." Signed-off-by: Luc Verhaegen <libv@skynet.be> Acked-by: Luc Verhaegen <libv@skynet.be> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4335 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-06-03CMOS: Add set_option and rework get_option.Luc Verhaegen
To ease some of my debugging pain on the unichrome, i decided i needed to move FB size selection into cmos, so i could test a size and then reset it to the default after loading this value so that the next reboot uses the (working) default again. This meant implementing set_option in parallel to get_option. get_option was then found to have inversed argument ordering (like outb) and passing char * and then depending on the cmos layout length, which made me feel quite uncomfortable. Since we either have reserved space (which we shouldn't do anything with in these two functions), an enum or a hexadecimal value, unsigned int seemed like the way to go. So all users of get_option now have their arguments inversed and switched from using ints to unsigned ints now. The way get_cmos_value was implemented forced us to not overlap byte and to have multibyte values be byte aligned. This logic is now adapted to do a full uint32_t read (when needed) at any offset and any length up to 32, and the shifting all happens inside an uint32_t as well. set_cmos_value was implemented similarly. Both routines have been extensively tested in a quick separate little program as it is not easy to get this stuff right. build_opt_tbl.c was altered to function correctly within these new parameters. The enum value retrieval has been changed strol(..., NULL, 10) to stroul(..., NULL, 0), so that we not only are able to use unsigned ints now but so that we also interprete hex values correctly. The 32bit limit gets imposed on all entries not marked reserved, an unused "user_data" field that appeared in a lot of cmos.layouts has been changed to reserved as well. Signed-off-by: Luc Verhaegen <libv@skynet.be> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4332 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-05-26Various fixes to the tree to get coreboot-v2 to build on SolarisPatrick Georgi
- Replace $(PWD) with $(CURDIR) in Makefiles. I don't know why the Solaris version behaves differently, but CURDIR is a safe choice on gnu make (and we require gnu make already) - Use tail -1 instead of tail -n1 in a file that already relies on tail -1 support in another place - Use tail -1 as alternative to tail -n1 in another place - Use #define for ulong_t in romcc, as that name is used on Solaris - Avoid fprinting a null pointer. The standard doesn't mandate that this is a special case, and Solaris doesn't implement it that way. Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4305 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-05-15There were a few updates lately that generates ROM size > 512K. I am ↵Vincent Lim
changing the default ROM size to 1M to accommodate this and future changes. I tested on SimNow family10h_1p.bsd and it POSTs OK. Signed-off-by: Vincent Lim <vincent.lim@amd.com> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4289 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-05-14Update equivalent processor revision ID to load latest microcode patches andMarc Jones
register setting for all FAM10 processors. This does not include new errata for FAM10 C2. Signed-off-by: Marc Jones <marcj303@gmail.com> Acked-by: Vincent Lim (vincent.lim@amd.com) git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4288 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-05-14Trivia: remove commentVincent Lim
Signed-off-by: Vincent Lim <vincent.lim@amd.com> Acked-by: Vincent Lim <vincent.lim@amd.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4287 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-05-14From AMD family 10h Processor BKDG (rev. D): a platform is capable of having ↵Vincent Lim
up to 8 nodes, and each nodes supports 1,2,3,4,5, or 6 cores. Signed-off-by: Vincent Lim <vincent.lim@amd.com> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4286 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-05-01Trivial patch to make #defines generated from cmos.layout have unique names. ↵Myles Watson
Kills a few more compiler warnings. Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4243 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-30Add "printk" support to all CAR targetsStefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4236 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-30Refactor copy_and_run so that it uses a single code base instead ofPatrick Georgi
3 (with one of them way too much assembler code). On the way, I had to make some changes to the way the code is built, which is an effort I want to expand over time. Right now, large portions of the in-ROM part of coreboot is compiled as a single file, with lots of .c files including other .c files. That has its justification for pre-raminit code, but it also affects lots of post-raminit code (memcpy doesn't really make sense before raminit, or at least CAR) The coreboot_apc code (AMD boards) gained some .c includes because I don't know that part of the code enough to really rework it and only have limited possibilities to test it. The includes should give an identical situation for this part of the code. This change was posted as set of 6 patches to the list, but they were mostly split for review purposes, hence commit them all at once. They can still be backed up using the patch files, if necessary. Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4233 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-22drop duplicate compiler options that are already mentioned in CFLAGS.Stefan Reinauer
(scan-build chokes on this) Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4181 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-21Thanks to Myles' patch adding support for include statements,Carl-Daniel Hailfinger
refactoring Config.lb became possible. Factor out ROM size calculation from Config.lb. This patch converts 87 boards (with and without USE_FAILOVER_IMAGE), but it has to work around a parser bug. 89 files changed, 209 insertions(+), 2415 deletions(-) A total of 2206 removed lines. Abuild works for all changed boards on khepri. Myles writes: I've tested serengeti for the failover portion and s2892 for the nofailover portion. ldoptions are exactly the same and they both boot the same. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Myles Watson <mylesgw@gmail.com> Acked-by: Peter Stuge <peter@stuge.se> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4147 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-15r4097 broke the tree and it remains unfixed :-( Stefan Reinauer
Repeat: Cosmetic patches shall not break the tree for 20 revisions. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4116 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-14v2/src romfs->cbfs renamePeter Stuge
This also has the config tool changes in v2/util. Rename romfs.[ch]->cbfs.[ch] and sed romfs->cbfs romtool->cbfstool ROMFS->CBFS Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4113 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-13I need to do uses HAVE_ACPI_RESUME for each board. Here we go.Rudolf Marek
Signed-off-by: Rudolf Marek <r.marek@assembler.cz> Acked-by: Rudolf Marek <r.marek@assembler.cz> It should fix the build break introduced in r4101 git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4105 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-12This patch cleans up the calls to $CC in mainboard Config.lb files. TheyCarl-Daniel Hailfinger
now all have the same parameter order. action "$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(TOP)/src -I. -nostdinc -nostdlib -fno-builtin -Wall -Os -c -S $(MAINBOARD)/$(CACHE_AS_RAM_AUTO_C) -o $@" The idea behind this parameter order is: - *FLAGS at the beginning. - Use a common set of *FLAGS. - Include files and directories listed afterwards. - nostdinc, nostdlib, no-builtin tell the compiler this is standalone code. - Warnings. They do not influence source or compilation. - Compilation strategy (small) and output mode (asm or binary). - File to be compiled. - Output name. - $(DEBUG_CFLAGS) and -S are only used for asm output. Other changes in this patch: - src/supermicro/h8dme/Config.lb now uses $DEBUG_CFLAGS instead of hardcoding the respective flags. - $DEBUG_CFLAGS was added to asm outputting $CC calls: supermicro/h8dme/Config.lb lippert/roadrunner-lx/Config.lb - $DISTRO_CFLAGS was added to some $CC calls in: iwill/dk8_htx/Config.lb (CAR AP code) supermicro/h8dmr/Config.lb (CAR AP code) supermicro/h8dme/Config.lb (CAR AP code) gigabyte/m57sli/Config.lb (CAR AP code) gigabyte/ga_2761gxdk/Config.lb (CAR AP code) amd/serengeti_cheetah_fam10/Config.lb (everywhere) msi/ms7135/Config.lb (everywhere) nvidia/l1_2pvv/Config.lb (CAR AP code) -$CFLAGS was added to all $CC calls in: amd/db800/Config.lb amd/dbm690t/Config.lb amd/norwich/Config.lb amd/pistachio/Config.lb amd/serengeti_cheetah/Config.lb amd/serengeti_cheetah_fam10/Config.lb arima/hdama/Config.lb artecgroup/dbe61/Config.lb asus/a8n_e/Config.lb asus/a8v-e_se/Config.lb asus/m2v-mx_se/Config.lb broadcom/blast/Config.lb digitallogic/msm800sev/Config.lb gigabyte/ga_2761gxdk/Config.lb gigabyte/m57sli/Config.lb ibm/e325/Config.lb ibm/e326/Config.lb iei/pcisa-lx-800-r10/Config.lb iwill/dk8_htx/Config.lb iwill/dk8s2/Config.lb iwill/dk8x/Config.lb kontron/986lcd-m/Config.lb lippert/roadrunner-lx/Config.lb lippert/spacerunner-lx/Config.lb msi/ms7135/Config.lb msi/ms7260/Config.lb msi/ms9185/Config.lb msi/ms9282/Config.lb newisys/khepri/Config.lb nvidia/l1_2pvv/Config.lb pcengines/alix1c/Config.lb sunw/ultra40/Config.lb supermicro/h8dme/Config.lb supermicro/h8dmr/Config.lb technexion/tim8690/Config.lb tyan/s2735/Config.lb tyan/s2850/Config.lb tyan/s2875/Config.lb tyan/s2880/Config.lb tyan/s2881/Config.lb tyan/s2882/Config.lb tyan/s2885/Config.lb tyan/s2891/Config.lb tyan/s2892/Config.lb tyan/s2895/Config.lb tyan/s2912/Config.lb tyan/s2912_fam10/Config.lb tyan/s4880/Config.lb tyan/s4882/Config.lb - Use $@ wherever appropriate. - Kill that evil CACHE_AS_RAM_AUTO_C variable. - Trailing whitespace fixups on lines which were touched anyway. We now only have 6 remaining different calls to $CC whereas before there were 20. If I am allowed to rename src/mainboard/kontron/986lcd-m/auto.c to src/mainboard/kontron/986lcd-m/cache_as_ram_auto.c, we're down to 4 different calls. If we can decide on the use of $CPU_OPT, we are down to 3 different calls. One additional point I'd like to clear up: if ASSEMBLER_DEBUG makedefine DEBUG_CFLAGS := -g -dA -fverbose-asm end "-dA -fverbose-asm" is only useful for asm output. For these flags, DEBUG_CFLAGS is a total misnomer. What about calling them DEBUG_ASMCFLAGS or somesuch? "-g" should be controllable by a separate switch. It is useful even for object code. The following targets are broken by this patch because they contain implicit declarations, but the error did not trigger due to missing CFLAGS: amd/serengeti_cheetah asus/a8v-e_se asus/m2v-mx_se digitallogic/msm800sev pcengines/alix1c supermicro/h8dme supermicro/h8dmr Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Ronald G. Minnich <rminnich@gmail.com> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4097 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-11Kill remaining unneeded CAR/ROMCC if-blocks.Carl-Daniel Hailfinger
Lots of Config.lb files still have "if USE_DCACHE_RAM" sections although USE_DCACHE_RAM is always set for them. Such checks are not only pointless, they actively make the files hard to read. A full abuild run confirmed that compilation did not change with this patch applied. The patch does not change whitespace of the remaining code to ease review and svn blame. With this change, it should be possible to have two or three Config.lb variants in total (except the actual hardware config). Right now, some Config.lb have comments, some don't, some have empty lines for better readability, some don't, some have leading whitespace, some don't. This is an utter mess and unifying these files would certainly reduce the headaches I have when looking at them. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4093 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-01Drop CONFIG_CHIP_NAME. Those config statements in Config.lb shouldStefan Reinauer
be used unconditionally, and the names don't hurt. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4042 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-03-31Add the CONFIG_ROMS config variable. Ronald G. Minnich
Tested under abuild, causes no trouble. Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> Acked-by: Patrick Georgi <patrick.georgi@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4035 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-03-17- TOM2 is filled in by the dynamic ACPI code. Don't hardcode it in theCarl-Daniel Hailfinger
DSDT and use the dynamic TOM2 variable instead. - The DSDT needs to be revision 2 or above to handle 64 bit variables. This will require a recent (not older than 2007) iasl (ACPI compiler). - Fix an incorrect comment. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4010 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-03-13This, ladies and gentlement, is commit #4000.Stefan Reinauer
Use the (almost) same strict CFLAGS in v2 that we use on v3. And fix a few include files and missing prototypes. Also, fix up the Config-abuild.lb files to properly work for cross compiling. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4000 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-03-10This patch makes the boards use a single amdk8_util.asl. There are onlyMyles Watson
whitespace differences between this file and the amdk8_util.asl from asus/m2v_mxe. It also enables SLIT filling if you have one, zeroes the unused fields in the srat_lapic structure, and adds some declarations in acpi.h. Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Rudolf Marek <r.marek@assembler.cz> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3986 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-03-04I just went on a bugfix frenzy and fixed all printk format warningsCarl-Daniel Hailfinger
triggered by the AMD 690/SB600 targets. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3970 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-02-28coreboot-v2: drop this ugly historic union name in v2 that was dropped in v3Stefan Reinauer
a long time ago. This will make it easier to port v2 boards forward to v3 at some point (and other things) Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3964 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-02-19This patch is for AMD boards which can do the P state generation. This justRudolf Marek
removes the ugly binary DSDT patching and all other related stuff. Stick to infrastructure in previous patch. Signed-off-by: Rudolf Marek <r.marek@assembler.cz> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3955 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-02-18Carl-Daniel's part:Carl-Daniel Hailfinger
This patch converts mainboard_$VENDOR_$BOARD_ops to mainboard_ops and mainboard_$VENDOR_$BOARD_config to mainboard_config. Ron's part: The config change that makes the naming change not break every build. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3954 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-02-15- Fix up amd pistachio and dbm690t.Stefan Reinauer
- make uma_memory_base and uma_memory_size uint64_t as they may be 64bit BARs on some platforms. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3949 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-02-12This patch converts __FUNCTION__ to __func__, since __func__ is standard.Myles Watson
Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3943 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-02-12Fix typo in PCI ID (1914 should have been 7914).Carl-Daniel Hailfinger
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3941 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-02-12Remove dead lines. Trivial.Carl-Daniel Hailfinger
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3940 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-02-12Rename TOM to TOM1 and refer to the SSDT value with an External(TOM1)Carl-Daniel Hailfinger
clause. An ITE87427 Super I/O does not exist. Use the real name (IT8712F) of the chip on the DBM690T board. Use decimal values for KELV, THOT and TCRT on the Pistachio board for better readability. Tested by Maggie Li on DBM690T and Pistachio. Tested by Carl-Daniel Hailfinger on Asus M2A-VM. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3939 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-02-12Improve mainboard.c comments for DBM690T and Pistachio.Carl-Daniel Hailfinger
Fix reference to documentation. Use __FUNCTION__ instead of hardcoding function names in printk messages. No functional changes. I'm slowly getting to the point where adding another RS690 board is really easy and needs almost no changes to the existing target. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3938 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-02-11Fix one leftover reference to AmlCode_ssdt which was forgotten in r3929.Carl-Daniel Hailfinger
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3936 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-02-03Following patch converts the run-time SSDT patching via update_ssdt funtion toRudolf Marek
new AML code generator. Compile-tested on all changed targets. I think it should work because it works for Asus M2V-MX SE. Signed-off-by: Rudolf Marek <r.marek@assembler.cz> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3929 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-01-28Correct FDAT->FADT typo.Carl-Daniel Hailfinger
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3922 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-01-20This patch makes the recently added assembler debug optional, as it mayStefan Reinauer
cause problems with certain toolchains. This patch will also safe some hard disk space for those of us working on laptops or netbooks with always too small disks. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3876 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-01-16The DBM90T code sets bit 10 in _PSS as part of the control value, butCarl-Daniel Hailfinger
bit 10 is part of NewVID. That means the resulting VID is wrong and causes the processor to crash. The Pistachio code has the same bug. This patch fixes the wrong setting and changes control from a magic and incorrect unexplained value (0xE8202C00) to a combination of explained values and shifts which has the right value (0xE8202800). It is tested on my machine and it survived 200 changes from minimum to maximum frequency every 100 ms under heavy load and under no load. In the long term we want to consolidate all AMD FIDVID code into one generic library file. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Maggie Li has tested it on her DBM690T board. It is ok. Acked-by: Maggie li <Maggie.li@amd.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3868 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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