summaryrefslogtreecommitdiff
path: root/src/mainboard/arima
AgeCommit message (Collapse)Author
2009-04-03Fix up the incomplete commit in r4055.Carl-Daniel Hailfinger
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Patrick Georgi <patrick.georgi@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4058 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-03There are more than a dozen targets in the v2 tree which refer to ROMCCCarl-Daniel Hailfinger
in their Config.lb but never use it. There's no point in keeping dead code around. This patch removes ROMCC remainders from Config.lb and kills orphaned auto.c and failover.c in the affected mainboard directories. arima/hdama ibm/e325 ibm/e326 iwill/dk8s2 iwill/dk8x msi/ms9282 newisys/khepri sunw/ultra40 tyan/s2891 tyan/s2892 tyan/s2895 tyan/s4880 tyan/s4882 Abuild log is completely identical with and without the patch. With this patch, the last ROMCC remainders for K8 boards are gone. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Patrick Georgi <patrick.georgi@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4055 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-03-31Add the CONFIG_ROMS config variable. Ronald G. Minnich
Tested under abuild, causes no trouble. Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> Acked-by: Patrick Georgi <patrick.georgi@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4035 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-02-28coreboot-v2: drop this ugly historic union name in v2 that was dropped in v3Stefan Reinauer
a long time ago. This will make it easier to port v2 boards forward to v3 at some point (and other things) Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3964 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-02-18Carl-Daniel's part:Carl-Daniel Hailfinger
This patch converts mainboard_$VENDOR_$BOARD_ops to mainboard_ops and mainboard_$VENDOR_$BOARD_config to mainboard_config. Ron's part: The config change that makes the naming change not break every build. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3954 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-01-20This patch makes the recently added assembler debug optional, as it mayStefan Reinauer
cause problems with certain toolchains. This patch will also safe some hard disk space for those of us working on laptops or netbooks with always too small disks. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3876 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-12-22In the process of trying to debug some HT sync problems I added lots ofCarl-Daniel Hailfinger
debug code to src/northbridge/amd/amdk8/incoherent_ht.c. However, printk is not available for all boards at that stage. I have changed the following boards: agami/aruma arima/hdama asus/a8n_e broadcom/blast ibm/e325 ibm/e326 iwill/dk8s2 iwill/dk8x msi/ms7135 newisys/khepri sunw/ultra40 tyan/s2850 tyan/s2875 tyan/s2880 tyan/s2881 tyan/s2882 tyan/s2885 tyan/s2891 tyan/s2892 tyan/s2895 tyan/s4880 tyan/s4882 abuild works fine for all of them. agami/aruma needs a Config-abuild.lb which doesn't have fallback and normal due to size problems. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Marc Jones <marcj303@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3829 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-11-28This patch from Ralf Grosse Boerger makes debugging more comfortable. Stefan Reinauer
With this patch it's possible to - determine the according source code line for each asm statement (objdump -dS) - determine the source code file for each asm statement (objdump -ddl) This isn't exactly trivial because cache_as_ram_auto.c gets compiled to assembly and converted by a perl script afterwards. This patch solves the problem - by extending cache_as_ram_auto.inc with debug information and line numbers - by correcting the perl calls (".text" --> "\.text") - by creating a disassembly with source code and line numbers. (ctr0.disasm and coreboot.disasm) There's one minor downside to the patch: A complete abuild run takes up around 1.6G instead of about 700MB now. But I'm sure this is quite reasonable for the benefits. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Please commit while this is being worked out. Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3778 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-10-13Drop unused (or commented / #if 0) reset.c files.Uwe Hermann
This is abuild-tested by me. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3654 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-10-01The ARRAY_SIZE macro is convenient, yet mostly unused. Switch lots ofCarl-Daniel Hailfinger
code to use it. That makes the code more readable and also less error-prone. Abuild tested. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3624 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-09-04This changes the python generated makefilesCarl-Daniel Hailfinger
targets/*/*/Makefile targets/*/*/normal/Makefile targets/*/*/fallback/Makefile to use a common copy of romcc, and to leave this compiler untouched by 'make clean' in targets/*/*/fallback/ and targets/*/*/normal/ . 'make clean' in targets/*/*/ will clean romcc. Thanks to Mats for the initial idea and implementation of a tool to do this. This patch has almost the same behaviour as the original tool without having to run the tool each time. Tested for abuild-friendliness. The patch saves ~10-12 seconds for every target using romcc. For a full abuild run, this is ~20% time saved. For the first 38 abuild targets, total build time is down to 13m24s instead of 16m22s on my machine. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Mats Erik Andersson <mats.andersson@gisladisker.se> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3564 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-01-26This patch fixes the remaining stack protector problem on v2. The ↵Ronald G. Minnich
DISTRO_CFLAGS were not being included on the CC line for cache_as_ram_auto.c Tested on ubuntu, where formerly it failed. Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> Acked-by: Corey Osgood <corey.osgood@gmail.com> Acked-by: Ward Vandewege <ward@gnu.org> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3079 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-01-18Rename almost all occurences of LinuxBIOS to coreboot. Stefan Reinauer
Due to the automatic nature of this update, I am self-acking. It worked in abuild. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3053 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-12-09This adds the same line (uses CONFIG_PRECOMPRESSED_PAYLOAD) to everyMyles Watson
Options.lb file that already had a "uses CONFIG_COMPRESSED_PAYLOAD_LZMA" line in it. I figure that only adding it to the files that already have support for LZMA payloads makes sure I don't break anything. Signed-off-by: Myles Watson <myles@pel.cs.byu.edu> Acked-by: Ward Vandewege <ward@gnu.org> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3002 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-11-02get arima hdama building again.Stefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2928 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-12-15Apply linuxbios-rename-other-payload-options.patchEd Swierk
(Patch 2, refs #14) Signed-off-by: Ed Swierk <eswierk@arastra.com> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2529 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-12-15Apply linuxbios-rename-compressed-payload-options.patch, refs #14Ed Swierk
Signed-off-by: Ed Swierk <eswierk@arastra.com> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2527 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-11-10* fix the automatic build system by compressing payloads if possibleStefan Reinauer
and leaving enough room for a real payload (not /dev/null) This is a wonderful example why "uses" sucks. * add Config-abuild.lb for those boards that dont build with the default settings and a real payload: arima/hdama, amd/quartet, amd/serengeti_cheetah, ibm/e326 * if lzma is installed and a real payload is used, try compressing it. * fix a small bug in "abuild --help" This patch is acked by me because its due to infrastructural changes only. Flames welcome. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2496 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-11-05Use the canonical name of the vendors/devices and theUwe Hermann
same format for all CHIP_NAME() entries in LinuxBIOS (Closes #20). Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Stefan Reinauer <stepan@linuxbios.org> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2490 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-11-02Remove some unneeded #includes from most mainboard.c files.Uwe Hermann
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2485 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-10-27Fix the CHIP_NAME() entries of all mainboards to have the same formatUwe Hermann
and (hopefully) the correct canonical name of the vendor and board. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2476 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-10-24Change all occurences of NSC to nsc in the code. The next commitUwe Hermann
will then rename the src/superio/NSC directory to src/superio/nsc. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2472 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-10-04AMD Rev F supportYinghai Lu
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2435 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-07-19closing issue 44: rename ram clocks in cmos.layoutStefan Reinauer
https://openbios.org/roundup/linuxbios/issue44 git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2340 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-04-03new cache_as_ram support Yinghai Lu
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2232 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-12-02issue 41 - fix up motherboard compilation. There's always hope.Stefan Reinauer
1201_ht_bus0_dev0_fidvid_mb.diff part 1 git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2120 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-10-25- See Issue Tracker id-13 "lnxi-patch-13".Jason Schildt
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2077 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-10-25- See Issue Tracker id-12 "lnxi-patch-12".Jason Schildt
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2076 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-10-25- See Issue Tracker id-9 "lnxi-patch-9".Jason Schildt
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2073 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-10-25- See Issue Tracker id-8 "lnxi-patch-8".Jason Schildt
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2072 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-10-25- See Issue Tracker id-7 "lnxi-patch-7"Jason Schildt
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2071 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-08-10Undoing all HDAMA commits from LNXI from r2005->2003Jason Schildt
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2006 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-08-09- Merge from linuxbios-lnxi (Linux Networx repository) up to public tree.Jason Schildt
- Special version for HDAMA rev G with 33Mhz test and reboot out. - Support for CPU rev E, dual core, memory hoisting, - corrected an SST flashing problem. Kernel bug work around (NUMA) - added a Kernel bug work around for assigning CPU's to memory. r2@gog: svnadmin | 2005-08-03 08:47:54 -0600 Create local LNXI branch r1110@gog: jschildt | 2005-08-09 10:35:51 -0600 - Merge from Tom Zimmerman's additions to the hdama code for dual core and 33Mhz fix. r1111@gog: jschildt | 2005-08-09 11:07:11 -0600 Stable Release tag for HDAMA-1.1.8.10 and HDAMA-1.1.8.10LANL r1112@gog: jschildt | 2005-08-09 15:09:32 -0600 - temporarily removing hdama tag to update to public repository. Will reset tag after update. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2004 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-07-08eric patchYinghai Lu
1. x86_setup_mtrr take address bit. 2. generic ht, pcix, pcie beidge... 3. scan bus and reset_bus 4. ht read ctrl to decide if the ht chain is ready 5. Intel e7520 and e7525 support 6. new ich5r support 7. intel sb 6300 support. yhlu patch 1. split x86_setup_mtrrs to fixed and var 2. if (resource->flags & IORESOURCE_FIXED ) return; in device.c pick_largest_resource 3. in_conherent.c K8_SCAN_PCI_BUS git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1982 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-07-06Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-61arch import user (historical)
Creator: Yinghai Lu <yhlu@tyan.com> write_pirq_routing_table for x86 git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1979 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-07-06Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-51arch import user (historical)
Creator: Yinghai Lu <yhlu@tyan.com> cache_as_ram for AMD and some intel git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1967 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-07-06Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-41arch import user (historical)
Creator: Li-Ta Lo <ollie@lanl.gov> Onboard VGA for HDAMA Added onboard VGA support for Arima/HDAMA git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1957 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-07-06Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-38arch import user (historical)
Creator: Li-Ta Lo <ollie@lanl.gov> emulator update x96emu update from Paulo git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1954 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-07-06Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-36arch import user (historical)
Creator: Li-Ta Lo <ollie@lanl.gov> emulator update Correction to the reduce emulator from Paulo git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1952 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-07-06Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-34arch import user (historical)
Creator: Yinghai Lu <yhlu@tyan.com> AMD D0/E0 Opteron new mem mapping support, AMD E Opteron mem hole support,AMD K8 Four Ranks DIMM support git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1950 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-01-10nodeidYinghai Lu
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1850 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-11-11mpspec.h: Tweak the write_smp_table macro so that it is safe if passed a ↵Eric Biederman
complex expression. crt0.S.lb: Modified so that it is safe to include console.inc console.c: Added print_debug_ and frieds which are non inline variants of the normal console functions div64.h: Only include limits.h if ULONG_MAX is not defined and define ULONG_MAX on ppc socket_754/Config.lb Conditionally set config chip.h socket_940.c We don't need and #if CONFIG_CHIP_NAME we won't be linked in if there are no references. slot_2/chip.h: The operations struct need to be spelled cpu_intelt_slot_2_ops slot_2/slot2.c: The same spelling fix socket_mPGA603/chip.h: again socket_mPGA603/socket_mPGA603_400Mhz.c: and again socket_mPGA604_533Mhz/Config.lb: Conditionally defing CONFIG_CHIP_NAME socket_mPGA604_800Mhz/chip.h: Another spelling fix socket_mPGA604_800Mhz.c and again via/model_centaur/model_centaur_init.c: It's not an intel CPU so don't worry about Intel microcode uptdates earlymtrr.c: Remove work around for older versions of romcc pci_ids.h: More ids. malloc.c: We don't need string.h any longer uart8250.c: Be consistent when delcaring functions static inline arima/hdama/mptable.c: Cleanup to be a little more consistent amdk8/coherent_ht.c: - Talk about nodes not cpus (In preparation for dual cores) - Remove clear_temp_row (as it is no longer needed) - Demoted the failure messages to spew. - Modified to gracefully handle failure (It should work now if cpus are removed) - Handle the non-SMP case in verify_mp_capabilities - Add clear_dead_routes which replaces clear_temp_row and does more - Reorganize setup_coherent_ht_domain to cleanly handle failure. - incoherent_ht.c: Clean up the indenation a little. i8259.c: remove blank lines at the start of the file. keyboard.c: Make pc_keyboard_init static ramtest.c: Add a print out limiter, and cleanup the printout a little. amd8111/Config.lb: Mention amd8111_smbus.c amd8111_usb.c: Call the structure usb_ops not smbus_ops. NSC/pc97307/chip.h: Fix spelling issue pc97307/superio.c: Use &ops no &pnp_ops. w83627hf/suerio.c: ditto w83627thf/suerio.c: ditto buildrom.c: Use braces around the body of a for loop. It's more maintainable. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1778 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-11-05- Ensure every copy of Options.lb uses:Eric Biederman
CROSS_COMPILE CC HOSTCC OBJCOPY git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1755 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-11-05- Modify all of the Opteron motherboards to have a separate logicalEric Biederman
chip for the amdk8/root_complex git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1750 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-11-04- Update abuild.sh so it will rebuild successfull buildsEric Biederman
- Move pci_set_method out of hardwaremain.c - Re-add debugging name field but only include the CONFIG_CHIP_NAME is enabled. All instances are now wrapped in CHIP_NAME - Many minor cleanups so most ports build. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1737 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-10-30- To reduce confuse rename the parts of linuxbios bios that run fromEric Biederman
ram linuxbios_ram instead of linuxbios_c and linuxbios_payload... - Reordered the linker sections so the LinuxBIOS fallback image can take more the 64KiB on x86 - ROM_IMAGE_SIZE now will work when it is specified as larger than 64KiB. - Tweaked the reset16.inc and reset16.lds to move the sanity check to see if everything will work. - Start using romcc's built in preprocessor (This will simplify header compiler checks) - Add helper functions for examining all of the resources - Remove debug strings from chip.h - Add llshell to src/arch/i386/llshell (Sometime later I can try it...) - Add the ability to catch exceptions on x86 - Add gdb_stub support to x86 - Removed old cpu options - Added an option so we can detect movnti support - Remove some duplicate definitions from pci_ids.h - Remove the 64bit resource code in amdk8/northbridge.c in preparation for making it generic - Minor romcc bug fixes git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1727 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-10-27sizeram removal/conversion.Eric Biederman
- mem.h and sizeram.h and all includes killed because the are no longer needed. - linuxbios_table.c updated to directly look at the device tree for occupied memory areas. - first very incomplete stab a converting the ppc code to work with the dynamic device tree - Ignore resources before we have read them from devices, (if the device is disabled ignore it's resources). - First stab at Pentium-M support - add part/init_timer.h making init_timer conditional until there is a better way of handling it. - Converted all of the x86 sizeram to northbridge set_resources functions. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1722 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-10-21- Bump the LinuxBIOS major versionEric Biederman
- Rename chip_config chip_operations throughout the tree - Fix Config.lb on most of the Opteron Ports - Fix the amd 8000 chipset support for setting the subsystem vendor and device ids - Add detection of devices that are on the motherboard (i.e. In Config.lb) - Baby step in getting the resource limit handling correct, Ignore fixed resources - Only call enable_childrens_resources on devices we know will have children For some busses like i2c it is non-sense and we don't want it. - Set the resource limits for pnp devices resources. - Improve the resource size detection for pnp devices. - Added a configuration register to amd8111_ide.c so we can enable/disable individual ide channels - Added a header file to hold the prototype of isa_dma_init - Fixed most of the superio chips so the should work now, the via superio pci device is the exception. - The code compiles and runs so it is time for me to go to bed. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1698 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-10-19change struct chip* to struct device*Li-Ta Lo
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1691 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-10-16- Bump MAX_LINKS to 4 I have actually found an i2c bridge that needs thisEric Biederman
- Fix the hdama Config.lb to not longer use the link keywords oops, and instead to have it nest everything properly. - Update config.g to not support the link keyword - update config.g to not support northbridge/southbridge/cpu/pmc noise words we can just use chip now. - Remove old link handling from the code - Detect and handle duplicate paths so we generate one device with multiple links git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1685 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
generated by cgit v1.2.3 (git 2.25.1) at 2024-12-24 04:45:16 +0000