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coreboot
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broadwell_refcode
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Some coreboot project code with my work
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dsdt.asl
Age
Commit message (
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Author
2020-03-18
mainboard/[a-f]*: Remove copyright notices
Patrick Georgi
2018-11-23
mb: Set coreboot as DSDT's manufacturer model ID
Elyes HAOUAS
2017-08-23
AGESA binaryPI: Consolidate and fix sleep states
Kyösti Mälkki
2017-03-16
asrock/e350m1: Include ASL for PS/2 controller
Paul Menzel
2015-10-31
tree: drop last paragraph of GPL copyright header
Patrick Georgi
2015-09-30
amd/family14: Add k10temp thermal zone.
Tobias Diedrich
2015-05-21
Remove address from GPLv2 headers
Patrick Georgi
2013-09-17
Fix whitespace leaked into tree
Kyösti Mälkki
2013-04-11
ASRock DSDT: Split the ASRock DSDT
Mike Loptien
2013-03-17
ASROCK Fam14 DSDT: Add secondary bus range to PCI0
Mike Loptien
2013-03-17
ASROCK Fam14 DSDT: Remove INI method from AZHD device
Mike Loptien
2013-03-17
ASROCK Fam14 DSDT: Add OSC method
Mike Loptien
2013-03-01
GPLv2 notice: Unify all files to just use one space in »MA 02110-1301«
Paul Menzel
2013-02-25
AMD Fam14 boards: Set P_BLK length to 6 for all processors
Paul Menzel
2013-02-25
AMD boards: ACPI DSDT: Use COREBOOT for the OEM Table ID field
Paul Menzel
2013-01-26
AMD boards, ASRock E350M1: Remove whitespace in front of comma in DSDT
Paul Menzel
2012-04-19
Leverage the Pstate table created by AGESA.
zbao
2012-02-22
ACPI: More ../../.. removal
Patrick Georgi
2011-06-04
Port persimmon r6588 to e350m1: VGA framebuffer
Marshall Buschman
2011-06-04
Port persimmon r6587 to e350m1: RTC is not PIIX4 compatible
Marshall Buschman
2011-06-04
Port persimmon r6578 and r6596 to e350m1: MMCONF base
Peter Stuge
2011-02-26
Add support for the ASRock E350M1, an AMD family 14h Fusion board.
Scott Duplichan
2011-02-24
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6376 2b7e53f0-3cfb-0310-b3e...
Scott Duplichan