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By default, the LPC SIRQ mode is set to Quiet mode. Therefore, COM-port
from the SurerIO chip don't work correctly after the LPC controller (PCI
0:1f.0) initialization. Console output is broken. The patch fixes this
bug by overriding the serirq_mode option in the devicetree.cb to set
Continuous SIRQ mode
Change-Id: I37e26b271fb61f6c0343d6bf65c029924df82caf
Signed-off-by: Maxim Polyakov <max.senia.poliak@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33801
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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The asrock/h110m has a NCT6791D, but is selecting the NCT6776-specific
SUPERIO_NUVOTON_NCT6776_COM_A symbol. Use the NCT6791D symbol instead.
Change-Id: I9f3fde161844f919b070f2b6ce7e106411439a9a
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33439
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Maxim Polyakov <m.poliakov@yahoo.com>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
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This does the following:
- select MAINBOARD_USES_FSP2_0 on Kabylake (does not support FSP1.1)
- Remove stale Kconfig option on intel/saddlebrook
- select SOC_INTEL_KABYLAKE on intel/kblrvp
Change-Id: I64f48eeb00150aea039d533b0ac471fdd8483b90
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33561
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
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Adds virtual logical devices numbers for the Nuvoton (NCT6791D)
SuperIO to the devicetree.
Change-Id: I7df1633951c30fef14c62c89aaedebd3044b312f
Signed-off-by: Maxim Polyakov <max.senia.poliak@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32267
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
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This patch adds support PCIe Gen 3 with 8GT/s link speed for PEG x16
slot. All parameters for FSP are set during initialization in
romstage. Now there is no need to additionally configure the FSP
before building the ROM image.
Tested on Intel Core i5-6600 processor with the following devices:
- LP11000e Fibre Channel HBA (Gen2 x8);
- PEX8734 PCIe Fabric/Switch (Gen3 x16);
- NVIDIA GeForce GTX 1060 GPU (Gen3 x16).
GPU works with an nouveau and proprietary driver under Ubuntu 18.04.2
(4.15.0-46-generic GNU/Linux kernel). Discrete graphic card is used
as primary device for display output. Dynamic switching is not yet
supported.
Tianocore (edk2-stable201811-216-g51be9d0) is used as the payload.
Change-Id: Ia4f29df47d76de5069fe53120434cc7c2ab6f044
Signed-off-by: Maxim Polyakov <max.senia.poliak@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/31948
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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If an external graphics card is inserted in the PEG, it will be used
as the primary display device (as in the AMI BIOS)
Change-Id: Iea846179fc309c2b98093de37c05ceb332081f4f
Signed-off-by: Maxim Polyakov <max.senia.poliak@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32172
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
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The InternalGfx option in devicetree.cb is not used to enable iGPU.
The patch removes this option from chip.h and mb/*/devicetree.cb
files for all boards with skl/kbl processor.
Change-Id: I41ecca3fdfb1d4b20ee634a13263ff481dcf440e
Signed-off-by: Maxim Polyakov <max.senia.poliak@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32171
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
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This board is compatible with Intel Skylake and Kaby Lake generation
processors. This patch contains the minimum configuration for booting
and stable operation of the Ubuntu OS (18.04.1, Linux kernel 4.15).
It is based on Intel RVP8 mainboard.
Intel Kaby Lake FSP 3.6.0 is used to initialize CPU and PCH.
Graphics init with libgfxinit.
Works:
- Integrated graphics (only DVI port, tested with 1920x1080);
- PEG x16 (FSP must be configured with BCT to enable PEG);
- all PCIe x1 slots;
- all USB and SATA ports;
- SuperIO COM port for console;
- onboard audio.
TODO:
- other SuperIO functions;
- onboard network chip;
- suspend and resume;
- documentation.
Tested on Intel Core i5-6600 processor with Seabios (rel-1.12.0-10-
g171fc89) and Tianocore/edk2 (vUDK2018-8-ge6eccfc) as a payload.
Change-Id: I69396edc50948cf1d0da649241ce92171d32daf7
Signed-off-by: Maxim Polyakov <max.senia.poliak@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/31603
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
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