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coreboot
2560p
820g2
autoport-hsw
broadwell_refcode
e6230
e7240_bdw
haswell-mrc
hp820g1
hp9480m
mec1322
Some coreboot project code with my work
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asus
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a8v-e_deluxe
Age
Commit message (
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Author
2010-12-08
Move "select CACHE_AS_RAM" lines from boards into CPU socket.
Uwe Hermann
2010-12-08
second round name simplification. drop the <component>_ prefix.
stepan
2010-12-08
first round name simplification. drop the <component>_ prefix.
stepan
2010-12-05
W83627DHG/W83627EHG fixups for virtual LDNs.
Uwe Hermann
2010-11-22
1) wraps the s3 parts of chipset code/memory init code with if CONFIG_HAVE_AC...
Rudolf Marek
2010-11-22
Final set of smp_write_bus -> mptable_write_buses changes.
Patrick Georgi
2010-11-21
Simplify a few code chunks, fix whitespace and indentation.
Uwe Hermann
2010-11-21
Drop excessive whitespace randomly sprinkled in romstage.c files.
Uwe Hermann
2010-11-21
Use DIMM0 et al in lots more places instead of hardocding values.
Uwe Hermann
2010-11-18
Drop unused and incorrect RTC_DEV for Winbond W83627EHG.
Uwe Hermann
2010-11-16
Move the SET_FIDVID* family of configuration options to Kconfig and
Patrick Georgi
2010-11-14
Add a target for the ASUS A8V-E Deluxe (trivial).
Uwe Hermann
