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path: root/src/mainboard/asus/p5qpl-am
AgeCommit message (Expand)Author
2019-11-01soc/intel/{IA-CPU/SOC}: Move sleepstates.asl into southbridge/intel/common/acpiSubrata Banik
2019-10-11sb/intel/i82801gx: Move CIR init to a common placeArthur Heymans
2019-08-26soc/intel: Use common romstage codeKyösti Mälkki
2019-08-18cpu/intel: Enter romstage without BISTKyösti Mälkki
2019-07-18mb/*/*/gpio: Use static for const structuresPeter Lemenkov
2019-06-06sb/intel/i82801gx: Detect if the southbridge supports AHCIArthur Heymans
2019-05-15src/mainboard: Remove unneeded include <arch/io.h>Elyes HAOUAS
2019-05-06src: Remove unused include <halt.h>Elyes HAOUAS
2019-04-29src/mb: Use system_reset()Elyes HAOUAS
2019-04-13sb/intel/i82801gx: Use SOUTHBRIDGE_INTEL_COMMON_PMCLIBPatrick Rudolph
2019-03-13{mb,nb/pineview}/*.asl: Remove unneeded include i82801gx.hElyes HAOUAS
2019-03-08coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX)Julius Werner
2019-03-04device/pnp: Add header files for PNP opsKyösti Mälkki
2019-03-01device/pci: Fix PCI accessor headersKyösti Mälkki
2019-02-08mb/{asrock,intel,kontron}: Include missing <arch/io.h>Elyes HAOUAS
2019-02-07src: Remove unused include device/pnp_def.hElyes HAOUAS
2019-01-14mb/asus/p5qpl-am: Add p5g41t-m_lx as a variantAngel Pons
2019-01-10mb: Move timestamp_add_now to northbridge x4xElyes HAOUAS
2019-01-09cpu/intel: Use the common code to initialize the romstage timestampsArthur Heymans
2019-01-08sb/intel/i82801gx: Autodisable functions based on devicetreeArthur Heymans
2019-01-07src/mb/asus/p5qpl-am/romstage.c: Fix commentAngel Pons
2018-12-28arch/x86: Drop spurious arch/stages.h includesKyösti Mälkki
2018-12-24mb/asus/p5qpl-am: Add mainboardArthur Heymans