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2009-06-30the tool chain settings should not be in renamed (as they will never live inStefan Reinauer
Kconfig) Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4384 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-06-30This patch unifies the use of config options in v2 to all start with CONFIG_Stefan Reinauer
It's basically done with the following script and some manual fixup: VARS=`grep ^define src/config/Options.lb | cut -f2 -d\ | grep -v ^CONFIG | grep -v ^COREBOOT |grep -v ^CC` for VAR in $VARS; do find . -name .svn -prune -o -type f -exec perl -pi -e "s/(^|[^0-9a-zA-Z_]+)$VAR($|[^0-9a-zA-Z_]+)/\1CONFIG_$VAR\2/g" {} \; done Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4381 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-06-19Undo my ugly commit that added uses clauses in lots of places instead of one.Myles Watson
Fix configuration of all boards. (Abuild tested) Hopefully fix compilation of PPC boards (they've never compiled for me.) Apologize profusely. Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4367 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-06-17Fix configuration of boards that didn't have uses CONFIG_USE_INIT. Trivial.Myles Watson
Abuild tested with -C. Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4360 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-06-06When I started refactoring mainboard Config.lb, I added two differentCarl-Daniel Hailfinger
files for targets without failover: src/config/nofailovercalculation.lb (64 kB XIP) src/config/nofailovercalculation128.lb (128 kB XIP) Targets with other XIP sizes were ignored. This patch moves XIP size back into mainboard code. Benefits from this patch: - src/config/nofailovercalculation128.lb is no longer needed - Targets with XIP sizes besides 64k and 128k benefit from refactoring - Conceptually, this makes the include files pure calculation files without settings. Abuild tested. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Patrick Georgi <patrick.georgi@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4348 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-06-03Revert "CMOS: Add set_option and rework get_option."Luc Verhaegen
This reverts commit eb7bb49eb5b48c39baf7a256b7c74e23e3da5660. Stepan pointed out that "s" means string, which makes the following statement in this commit message invalid: "Since we either have reserved space (which we shouldn't do anything with in these two functions), an enum or a hexadecimal value, unsigned int seemed like the way to go." Signed-off-by: Luc Verhaegen <libv@skynet.be> Acked-by: Luc Verhaegen <libv@skynet.be> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4335 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-06-03CMOS: Add set_option and rework get_option.Luc Verhaegen
To ease some of my debugging pain on the unichrome, i decided i needed to move FB size selection into cmos, so i could test a size and then reset it to the default after loading this value so that the next reboot uses the (working) default again. This meant implementing set_option in parallel to get_option. get_option was then found to have inversed argument ordering (like outb) and passing char * and then depending on the cmos layout length, which made me feel quite uncomfortable. Since we either have reserved space (which we shouldn't do anything with in these two functions), an enum or a hexadecimal value, unsigned int seemed like the way to go. So all users of get_option now have their arguments inversed and switched from using ints to unsigned ints now. The way get_cmos_value was implemented forced us to not overlap byte and to have multibyte values be byte aligned. This logic is now adapted to do a full uint32_t read (when needed) at any offset and any length up to 32, and the shifting all happens inside an uint32_t as well. set_cmos_value was implemented similarly. Both routines have been extensively tested in a quick separate little program as it is not easy to get this stuff right. build_opt_tbl.c was altered to function correctly within these new parameters. The enum value retrieval has been changed strol(..., NULL, 10) to stroul(..., NULL, 0), so that we not only are able to use unsigned ints now but so that we also interprete hex values correctly. The 32bit limit gets imposed on all entries not marked reserved, an unused "user_data" field that appeared in a lot of cmos.layouts has been changed to reserved as well. Signed-off-by: Luc Verhaegen <libv@skynet.be> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4332 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-05-31Following patch moves all vt8237 fadt.c from mainboard/* file to chipsetRudolf Marek
directory just with one common file. Changes to FADT: move to rev4, fix the generic register descriptors, detect additional VT8237S features. Change the compiler to CORE , its revision to 42. Signed-off-by: Rudolf Marek <r.marek@assembler.cz> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4327 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-05-29enable/disable IDE 0/1 (Primary/Secondary) interfaces on the i82801xx ↵Joseph Smith
southbridge. Signed-off-by: Joseph Smith <joe@settoplinux.org> Acked-by: Ronald G. Minnich <rminnich@gmail.com> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4324 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-05-26Various fixes to the tree to get coreboot-v2 to build on SolarisPatrick Georgi
- Replace $(PWD) with $(CURDIR) in Makefiles. I don't know why the Solaris version behaves differently, but CURDIR is a safe choice on gnu make (and we require gnu make already) - Use tail -1 instead of tail -n1 in a file that already relies on tail -1 support in another place - Use tail -1 as alternative to tail -n1 in another place - Use #define for ulong_t in romcc, as that name is used on Solaris - Avoid fprinting a null pointer. The standard doesn't mandate that this is a special case, and Solaris doesn't implement it that way. Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4305 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-05-26the i82801xx driver does not know ide{0,1}_enable in its chip.h, so comment itStefan Reinauer
out in the mainboard config file. (trivial) Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4303 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-05-10Following patch fixes the XIP computation issue. I removed the normal imageRudolf Marek
because it was not working anyway (it was hardcoded) and because it allows me to fix the XIP base to something sane (and use generic computation and approach) This board is bit tricky because until now it required the VGA BIOS on the flash start. XIP will work with 64KB aligned base, therefore the VGA ROM image must be aligned too to 64KB. Signed-off-by: Rudolf Marek <r.marek@assembler.cz> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4265 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-05-02Run dos2unix on all files:Stefan Reinauer
find . -type f| grep -v svn | xargs dos2unix Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4250 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-05-01Trivial patch to make #defines generated from cmos.layout have unique names. ↵Myles Watson
Kills a few more compiler warnings. Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4243 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-30Refactor copy_and_run so that it uses a single code base instead ofPatrick Georgi
3 (with one of them way too much assembler code). On the way, I had to make some changes to the way the code is built, which is an effort I want to expand over time. Right now, large portions of the in-ROM part of coreboot is compiled as a single file, with lots of .c files including other .c files. That has its justification for pre-raminit code, but it also affects lots of post-raminit code (memcpy doesn't really make sense before raminit, or at least CAR) The coreboot_apc code (AMD boards) gained some .c includes because I don't know that part of the code enough to really rework it and only have limited possibilities to test it. The includes should give an identical situation for this part of the code. This change was posted as set of 6 patches to the list, but they were mostly split for review purposes, hence commit them all at once. They can still be backed up using the patch files, if necessary. Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4233 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-28Enable HAVE_HIGH_TABLES by default for northbridges withPatrick Georgi
support for it. The related mainboards don't need to activate it themselves anymore. Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4224 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-28add_mainboard_resources is necessary for some boards (eg. kontron), butPatrick Georgi
this generic code could be added to the caller of add_mainboard_resources (wrapped in HAVE_HIGH_TABLES, of course). That way, boards that really need it (for other things) can use this function, while others don't have to do anything to use HAVE_HIGH_TABLES. Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4223 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-22drop duplicate compiler options that are already mentioned in CFLAGS.Stefan Reinauer
(scan-build chokes on this) Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4181 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-21Thanks to Myles' patch adding support for include statements,Carl-Daniel Hailfinger
refactoring Config.lb became possible. Factor out ROM size calculation from Config.lb. This patch converts 87 boards (with and without USE_FAILOVER_IMAGE), but it has to work around a parser bug. 89 files changed, 209 insertions(+), 2415 deletions(-) A total of 2206 removed lines. Abuild works for all changed boards on khepri. Myles writes: I've tested serengeti for the failover portion and s2892 for the nofailover portion. ldoptions are exactly the same and they both boot the same. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Myles Watson <mylesgw@gmail.com> Acked-by: Peter Stuge <peter@stuge.se> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4147 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-18Add support for the ASUS P2B-D mainboard.Uwe Hermann
This is a pretty standard "yet another 440BX" target, so the code is pretty straight-forward. It's a dual-CPU machine, which might need some fixing, I'm booting with 'maxcpus=0' for now. It does boot successfully up to a Linux login prompt, though. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4133 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-16I deleted mptable.c in my patch, but forgot to svn rm it.Myles Watson
Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4123 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-15This patch cleans up mpspec.h and allows it to be included whenMyles Watson
HAVE_MP_TABLE=0 It also removes the artifacts from the Asus m2v-mx_se that were necessary before the change. Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4120 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-14v2/src romfs->cbfs renamePeter Stuge
This also has the config tool changes in v2/util. Rename romfs.[ch]->cbfs.[ch] and sed romfs->cbfs romtool->cbfstool ROMFS->CBFS Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4113 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-13I need to do uses HAVE_ACPI_RESUME for each board. Here we go.Rudolf Marek
Signed-off-by: Rudolf Marek <r.marek@assembler.cz> Acked-by: Rudolf Marek <r.marek@assembler.cz> It should fix the build break introduced in r4101 git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4105 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-13Following patch adds support for the ACPI resume on Asus M2V-MX SE. The ACPIRudolf Marek
code just blinks the leds. The motherboard resources are use to reserve coreboot used memory. Signed-off-by: Rudolf Marek <r.marek@assembler.cz> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4103 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-13Fix the following errors:Carl-Daniel Hailfinger
In file included from src/mainboard/asus/a8v-e_se/cache_as_ram_auto.c:93: src/northbridge/amd/amdk8/raminit.c: In function ‘sdram_set_spd_registers’: src/northbridge/amd/amdk8/raminit.c:2123: error: implicit declaration of function ‘activate_spd_rom’ In file included from src/mainboard/asus/a8v-e_se/cache_as_ram_auto.c:101: src/cpu/amd/model_fxx/init_cpus.c: In function ‘init_cpus’: src/cpu/amd/model_fxx/init_cpus.c:319: error: implicit declaration of function ‘soft_reset’ In file included from src/mainboard/asus/m2v-mx_se/cache_as_ram_auto.c:98: src/northbridge/amd/amdk8/raminit_f.c: In function ‘sdram_set_spd_registers’: src/northbridge/amd/amdk8/raminit_f.c:2848: error: implicit declaration of function ‘activate_spd_rom’ Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4098 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-12This patch cleans up the calls to $CC in mainboard Config.lb files. TheyCarl-Daniel Hailfinger
now all have the same parameter order. action "$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(TOP)/src -I. -nostdinc -nostdlib -fno-builtin -Wall -Os -c -S $(MAINBOARD)/$(CACHE_AS_RAM_AUTO_C) -o $@" The idea behind this parameter order is: - *FLAGS at the beginning. - Use a common set of *FLAGS. - Include files and directories listed afterwards. - nostdinc, nostdlib, no-builtin tell the compiler this is standalone code. - Warnings. They do not influence source or compilation. - Compilation strategy (small) and output mode (asm or binary). - File to be compiled. - Output name. - $(DEBUG_CFLAGS) and -S are only used for asm output. Other changes in this patch: - src/supermicro/h8dme/Config.lb now uses $DEBUG_CFLAGS instead of hardcoding the respective flags. - $DEBUG_CFLAGS was added to asm outputting $CC calls: supermicro/h8dme/Config.lb lippert/roadrunner-lx/Config.lb - $DISTRO_CFLAGS was added to some $CC calls in: iwill/dk8_htx/Config.lb (CAR AP code) supermicro/h8dmr/Config.lb (CAR AP code) supermicro/h8dme/Config.lb (CAR AP code) gigabyte/m57sli/Config.lb (CAR AP code) gigabyte/ga_2761gxdk/Config.lb (CAR AP code) amd/serengeti_cheetah_fam10/Config.lb (everywhere) msi/ms7135/Config.lb (everywhere) nvidia/l1_2pvv/Config.lb (CAR AP code) -$CFLAGS was added to all $CC calls in: amd/db800/Config.lb amd/dbm690t/Config.lb amd/norwich/Config.lb amd/pistachio/Config.lb amd/serengeti_cheetah/Config.lb amd/serengeti_cheetah_fam10/Config.lb arima/hdama/Config.lb artecgroup/dbe61/Config.lb asus/a8n_e/Config.lb asus/a8v-e_se/Config.lb asus/m2v-mx_se/Config.lb broadcom/blast/Config.lb digitallogic/msm800sev/Config.lb gigabyte/ga_2761gxdk/Config.lb gigabyte/m57sli/Config.lb ibm/e325/Config.lb ibm/e326/Config.lb iei/pcisa-lx-800-r10/Config.lb iwill/dk8_htx/Config.lb iwill/dk8s2/Config.lb iwill/dk8x/Config.lb kontron/986lcd-m/Config.lb lippert/roadrunner-lx/Config.lb lippert/spacerunner-lx/Config.lb msi/ms7135/Config.lb msi/ms7260/Config.lb msi/ms9185/Config.lb msi/ms9282/Config.lb newisys/khepri/Config.lb nvidia/l1_2pvv/Config.lb pcengines/alix1c/Config.lb sunw/ultra40/Config.lb supermicro/h8dme/Config.lb supermicro/h8dmr/Config.lb technexion/tim8690/Config.lb tyan/s2735/Config.lb tyan/s2850/Config.lb tyan/s2875/Config.lb tyan/s2880/Config.lb tyan/s2881/Config.lb tyan/s2882/Config.lb tyan/s2885/Config.lb tyan/s2891/Config.lb tyan/s2892/Config.lb tyan/s2895/Config.lb tyan/s2912/Config.lb tyan/s2912_fam10/Config.lb tyan/s4880/Config.lb tyan/s4882/Config.lb - Use $@ wherever appropriate. - Kill that evil CACHE_AS_RAM_AUTO_C variable. - Trailing whitespace fixups on lines which were touched anyway. We now only have 6 remaining different calls to $CC whereas before there were 20. If I am allowed to rename src/mainboard/kontron/986lcd-m/auto.c to src/mainboard/kontron/986lcd-m/cache_as_ram_auto.c, we're down to 4 different calls. If we can decide on the use of $CPU_OPT, we are down to 3 different calls. One additional point I'd like to clear up: if ASSEMBLER_DEBUG makedefine DEBUG_CFLAGS := -g -dA -fverbose-asm end "-dA -fverbose-asm" is only useful for asm output. For these flags, DEBUG_CFLAGS is a total misnomer. What about calling them DEBUG_ASMCFLAGS or somesuch? "-g" should be controllable by a separate switch. It is useful even for object code. The following targets are broken by this patch because they contain implicit declarations, but the error did not trigger due to missing CFLAGS: amd/serengeti_cheetah asus/a8v-e_se asus/m2v-mx_se digitallogic/msm800sev pcengines/alix1c supermicro/h8dme supermicro/h8dmr Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Ronald G. Minnich <rminnich@gmail.com> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4097 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-11Kill remaining unneeded CAR/ROMCC if-blocks.Carl-Daniel Hailfinger
Lots of Config.lb files still have "if USE_DCACHE_RAM" sections although USE_DCACHE_RAM is always set for them. Such checks are not only pointless, they actively make the files hard to read. A full abuild run confirmed that compilation did not change with this patch applied. The patch does not change whitespace of the remaining code to ease review and svn blame. With this change, it should be possible to have two or three Config.lb variants in total (except the actual hardware config). Right now, some Config.lb have comments, some don't, some have empty lines for better readability, some don't, some have leading whitespace, some don't. This is an utter mess and unifying these files would certainly reduce the headaches I have when looking at them. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4093 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-01Drop CONFIG_CHIP_NAME. Those config statements in Config.lb shouldStefan Reinauer
be used unconditionally, and the names don't hurt. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4042 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-03-31Add the CONFIG_ROMS config variable. Ronald G. Minnich
Tested under abuild, causes no trouble. Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> Acked-by: Patrick Georgi <patrick.georgi@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4035 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-03-31cosmetic fix for function definition.Stefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4033 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-03-21To make use of HAVE_HIGH_TABLES following patch is needed. Also, it movesRudolf Marek
coreboot to 1MB and tries to cache whole range for XIP. The UMA part colide a bit with the HAVE_HIGH_TABLES region. I solved that by relocation of the region. Signed-off-by: Rudolf Marek <r.marek@assembler.cz> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4025 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-03-21To make use of HAVE_HIGH_TABLES following patch is needed. Also, it movesRudolf Marek
coreboot to 1MB and tries to cache whole range for XIP. The UMA part colide a bit with the HAVE_HIGH_TABLES region. I solved that by relocation of the region. Signed-off-by: Rudolf Marek <r.marek@assembler.cz> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4024 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-03-10This patch makes the boards use a single amdk8_util.asl. There are onlyMyles Watson
whitespace differences between this file and the amdk8_util.asl from asus/m2v_mxe. It also enables SLIT filling if you have one, zeroes the unused fields in the srat_lapic structure, and adds some declarations in acpi.h. Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Rudolf Marek <r.marek@assembler.cz> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3986 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-02-18Carl-Daniel's part:Carl-Daniel Hailfinger
This patch converts mainboard_$VENDOR_$BOARD_ops to mainboard_ops and mainboard_$VENDOR_$BOARD_config to mainboard_config. Ron's part: The config change that makes the naming change not break every build. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3954 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-02-14Following patch adds dynamically generated P-States infrastructure as well asRudolf Marek
M2V-MX SE as example how to do that. It is based on AMD code and mine code for ACPI generation. Signed-off-by: Rudolf Marek <r.marek@assembler.cz> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3946 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-02-01Following patch adds dynamic ACPI AML code generator which can be used toRudolf Marek
generate run-time ACPI ASL code. Moreover it demonstrates its use on Asus M2V-MX SE where the SSDT table is generated by new function k8acpi_write_vars (technically similar to update_ssdt). But lot of nicer. x Signed-off-by: Rudolf Marek <r.marek@assembler.cz> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3925 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-01-20This patch makes the recently added assembler debug optional, as it mayStefan Reinauer
cause problems with certain toolchains. This patch will also safe some hard disk space for those of us working on laptops or netbooks with always too small disks. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3876 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-12-23This belongs to changeset: 3840Rudolf Marek
The attached patch adds missing bits to ACPI to make Windows XP and Windows Vista happy. The FADT bootarch flags Blacklists MSI for this chipset (maybe not needed) Adds modified amdk8_util.asl Adds the SSDT table to chain of tables Aligns the FACS correctly (this should be done for other boards) Adds the _CRS method to Asus M2V-MX SE acpi DSDT. Fixes the FACS table length. Signed-off-by: Rudolf Marek <r.marek@assembler.cz> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3842 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-12-23Following patch fixes error code 12 in Windows XP and Vista. The function ↵Rudolf Marek
field of _PRT entry must be always 0xffff (any function). Signed-off-by: Rudolf Marek <r.marek@assembler.cz> Acked-By: Patrick Georgi <patrick@georgi-clan.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3841 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-12-23The attached patch adds missing bits to ACPI to make Windows XP and Windows ↵Rudolf Marek
Vista happy. The FADT bootarch flags Blacklists MSI for this chipset (maybe not needed) Adds modified amdk8_util.asl Adds the SSDT table to chain of tables Aligns the FACS correctly (this should be done for other boards) Adds the _CRS method to Asus M2V-MX SE acpi DSDT. Fixes the FACS table length. Signed-off-by: Rudolf Marek <r.marek@assembler.cz> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3840 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-12-22In the process of trying to debug some HT sync problems I added lots ofCarl-Daniel Hailfinger
debug code to src/northbridge/amd/amdk8/incoherent_ht.c. However, printk is not available for all boards at that stage. I have changed the following boards: agami/aruma arima/hdama asus/a8n_e broadcom/blast ibm/e325 ibm/e326 iwill/dk8s2 iwill/dk8x msi/ms7135 newisys/khepri sunw/ultra40 tyan/s2850 tyan/s2875 tyan/s2880 tyan/s2881 tyan/s2882 tyan/s2885 tyan/s2891 tyan/s2892 tyan/s2895 tyan/s4880 tyan/s4882 abuild works fine for all of them. agami/aruma needs a Config-abuild.lb which doesn't have fallback and normal due to size problems. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Marc Jones <marcj303@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3829 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-12-19This patch fixes the build for asus/m2v-mx_se. Its hard_reset function is notMyles Watson
implemented (It just prints "hard_reset not implemented. FIX ME!" This patch defines HAVE_HARD_RESET 1 and adds a #warning hard_reset not implemented. The net effect is that hard_reset prints something instead of just entering an infinite loop. Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Marc Jones <marcj303@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3823 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-12-15Add initial support for the ASUS P2B-DS (dual-CPU) mainboard.Uwe Hermann
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3815 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-12-10Use -O2 and -mcpu=p2 as romcc options for all Intel 440BX boards.Uwe Hermann
This should hopefully make the "too few registers" error pop up less often. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Peter Stuge <peter@stuge.se> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3810 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-12-04This belongs to changeset 3795.Rudolf Marek
The patch changes the LDTSTOP length as well mostly default content of 0xec, 0xe4 and 0xe5 registers. I'm suspecting that the documentation may be wrong. Furthermore this fix for powernow may not work on CPUs hit by errata #181. Workaround should be implemented. The powernow may not work on pre-A2 revisions of VT8237S silicon, revision reg is unknown. Signed-off-by: Rudolf Marek <r.marek@assembler.cz> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3796 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-12-04The patch changes the LDTSTOP length as well mostly default content of 0xec,Rudolf Marek
0xe4 and 0xe5 registers. I'm suspecting that the documentation may be wrong. Furthermore this fix for powernow may not work on CPUs hit by errata #181. Workaround should be implemented. The powernow may not work on pre-A2 revisions of VT8237S silicon, revision reg is unknown. Signed-off-by: Rudolf Marek <r.marek@assembler.cz> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3795 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-11-28This patch from Ralf Grosse Boerger makes debugging more comfortable. Stefan Reinauer
With this patch it's possible to - determine the according source code line for each asm statement (objdump -dS) - determine the source code file for each asm statement (objdump -ddl) This isn't exactly trivial because cache_as_ram_auto.c gets compiled to assembly and converted by a perl script afterwards. This patch solves the problem - by extending cache_as_ram_auto.inc with debug information and line numbers - by correcting the perl calls (".text" --> "\.text") - by creating a disassembly with source code and line numbers. (ctr0.disasm and coreboot.disasm) There's one minor downside to the patch: A complete abuild run takes up around 1.6G instead of about 700MB now. But I'm sure this is quite reasonable for the benefits. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Please commit while this is being worked out. Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3778 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-11-27Remove the unnecessary memctrl[] indirection, 440BX only has oneUwe Hermann
memory controller. Also, drop some unused '#if 0' code. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3773 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-11-20Get rid of the unnecessary indirection by 'struct mem_controller' for theUwe Hermann
Intel 810 chipset (and all boards using it). This isn't required for this chipset as there's only one memory controller. This also helps a lot with romcc register usage, you should see the dreaded "too few registers" less often. Build-tested with all three boards using the Intel 810 chipset. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Corey Osgood <corey.osgood@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3764 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1