| Age | Commit message (Expand) | Author |
|---|---|---|
| 2018-08-17 | arm64: Factor out common parts of romstage execution flow | Julius Werner |
| 2018-07-30 | mb/cavium/cn8100_sff_evb: Compile devicetree for Linux | Patrick Rudolph |
| 2018-07-23 | soc/cavium: Enable DRAM test | Patrick Rudolph |
| 2018-07-19 | soc/cavium: Add PCI support | Patrick Rudolph |
| 2018-07-17 | cavium/bdk: Fix coverity and remove hardcoded DRAM speed | Patrick Rudolph |
| 2018-07-10 | soc/cavium: Add secondary CPU support | Patrick Rudolph |
| 2018-07-10 | soc/cavium/cn81xx: Set cntfrq_el0 | Patrick Rudolph |
| 2018-07-10 | mb/cavium/cn8100_sff_evb: Be verbose | Patrick Rudolph |
| 2018-07-10 | soc/cavium: Clean uart code | Patrick Rudolph |
| 2018-07-10 | soc/cavium: Enable MMU | Patrick Rudolph |
| 2018-07-10 | cavium: Add CN81xx SoC and eval board support | David Hendricks |
 |
index : coreboot | |
| Some coreboot project code with my work | vimacs |
| summaryrefslogtreecommitdiff |