| Age | Commit message (Expand) | Author |
|---|---|---|
| 2015-04-06 | New mechanism to define SRAM/memory map with automatic bounds checking | Julius Werner |
| 2014-12-01 | Add UCB RISCV support for architecture, soc, and emulation mainboard.. | Ronald G. Minnich |
 |
index : coreboot | |
| Some coreboot project code with my work | vimacs |
| summaryrefslogtreecommitdiff |