coreboot - Some coreboot project code with my work

Age	Commit message (Expand)	Author
2020-05-18	mainboard///Kconfig*: Remove leading blank lines from SPDX header	Elyes HAOUAS
2020-05-11	treewide: Remove "this file is part of" lines	Patrick Georgi
2020-05-09	src/: Replace GPL boilerplate with SPDX header	Patrick Georgi
2020-03-18	mainboard/[a-f]*: Remove copyright notices	Patrick Georgi
2019-11-23	Kconfig: comply to Linux 5.3's Kconfig language rules	Patrick Georgi
2019-08-03	mb/emulation/qemu-riscv: Add opensbi support	Patrick Rudolph
2019-06-28	mb/emulation/qemu-riscv: Use generic 8250 uart driver	Patrick Rudolph
2019-02-13	riscv: Add initial support for 32bit boards	Philipp Hug
2019-01-26	mb/qemu-riscv: update to match current qemu version	Philipp Hug
2018-11-28	mb///Kconfig: Remove useless comment	Elyes HAOUAS
2018-10-22	mainboard/: Select MISSING_BOARD_RESET appropriately	Nico Huber
2018-10-06	mb/emulation/*-riscv: Remove "UCB" from RISC-V board names	Jonathan Neuschäfer
2017-09-27	mb/emu/*-riscv: Remove outdated memory map	Jonathan Neuschäfer
2017-02-23	mb/emulation/*-riscv: Don't select ARCH_BOOTBLOCK_RISCV	Jonathan Neuschäfer
2016-08-18	Kconfig: lay groundwork for not assuming SPI flash boot device	Aaron Durbin
2016-06-17	Define RAMTOP for x86 only	Kyösti Mälkki
2015-04-14	CBFS: Automate ROM image layout and remove hardcoded offsets	Julius Werner
2015-04-06	New mechanism to define SRAM/memory map with automatic bounds checking	Julius Werner
2014-12-01	Add UCB RISCV support for architecture, soc, and emulation mainboard..	Ronald G. Minnich