summaryrefslogtreecommitdiff
path: root/src/mainboard/emulation/qemu-riscv/uart.c
AgeCommit message (Expand)Author
2015-04-17uart: pass register width in the coreboot tableVadim Bendebury
2014-12-04RISCV: get RISCV to build againRonald G. Minnich
2014-12-01Add UCB RISCV support for architecture, soc, and emulation mainboard..Ronald G. Minnich