coreboot - Some coreboot project code with my work

Age	Commit message (Expand)	Author
2020-05-09	src/: Replace GPL boilerplate with SPDX header	Patrick Georgi
2020-04-04	mainboard/emulation: Use SPDX for GPL-2.0-only files	Angel Pons
2020-03-18	mainboard/[a-f]*: Remove copyright notices	Patrick Georgi
2019-12-11	fmap: Make FMAP_CACHE mandatory if it is configured in	Julius Werner
2019-12-06	mb/emulation/qemu-riscv: Implement ipi using clint to enable smp in qemu/spike.	Philipp Hug
2019-11-23	Kconfig: comply to Linux 5.3's Kconfig language rules	Patrick Georgi
2019-11-01	mb/emulation/*-riscv: Initialize cbmem in romstage	Arthur Heymans
2019-08-03	mb/emulation/qemu-riscv: Add opensbi support	Patrick Rudolph
2019-07-30	mb/emulation/qemu-riscv: Protect CBFS from payload loader	Patrick Rudolph
2019-07-29	mb/emulation/qemu-riscv: Fix regression	Patrick Rudolph
2019-07-28	lib: Rewrite qemu-armv7 ramdetect	Patrick Rudolph
2019-06-28	mb/emulation/qemu-riscv: Use generic 8250 uart driver	Patrick Rudolph
2019-06-21	mb/emulation/qemu-riscv: Support arbitrary ROM sizes	Patrick Rudolph
2019-03-04	arch/io.h: Drop unnecessary include	Kyösti Mälkki
2019-02-13	riscv: Add initial support for 32bit boards	Philipp Hug
2019-01-26	mb/qemu-riscv: update to match current qemu version	Philipp Hug
2018-12-05	mb/emulation/spike-riscv: Implement mtime_init	Jonathan Neuschäfer
2018-11-28	mb///Kconfig: Remove useless comment	Elyes HAOUAS
2018-10-22	mainboard/: Select MISSING_BOARD_RESET appropriately	Nico Huber
2018-10-06	mb/emulation/*-riscv: Remove "UCB" from RISC-V board names	Jonathan Neuschäfer
2018-06-09	mainboard: Get rid of device_t in ramstage	Elyes HAOUAS
2018-06-02	src/mainboard: Add and update license headers	Martin Roth
2018-04-27	RISC-V boards: Remove PAGETABLES section from memlayout.ld	Jonathan Neuschäfer
2017-09-27	mb/emu/*-riscv: Remove outdated memory map	Jonathan Neuschäfer
2017-02-23	mb/emulation/*-riscv: Don't select ARCH_BOOTBLOCK_RISCV	Jonathan Neuschäfer
2016-11-07	riscv: Unify SBI call implementations under arch/riscv/	Jonathan Neuschäfer
2016-10-24	RISCV: Clean up the common architectural code	Ronald G. Minnich
2016-10-15	riscv: Use the generic src/lib/bootblock.c	Jonathan Neuschäfer
2016-10-15	riscv: Clean up {qemu,spike}_util	Jonathan Neuschäfer
2016-10-15	riscv and power8: Convert printk/while(1) to die	Jonathan Neuschäfer
2016-08-19	qemu-riscv: Remove obsolete CSR - send_ipi	Martin Roth
2016-08-18	Kconfig: lay groundwork for not assuming SPI flash boot device	Aaron Durbin
2016-08-02	arch/riscv: Add include/arch/barrier.h	Jonathan Neuschäfer
2016-07-14	spike-riscv: Look for the CBFS in RAM	Jonathan Neuschäfer
2016-06-17	Define RAMTOP for x86 only	Kyösti Mälkki
2016-04-28	Add board URLs for the RISC-V boards	Jonathan Neuschäfer
2015-10-31	tree: drop last paragraph of GPL copyright header	Patrick Georgi
2015-09-16	riscv-memlayout: fix existing memlayout issues, add sbi interface	Thaminda Edirisooriya
2015-06-08	Remove empty lines at end of file	Elyes HAOUAS
2015-05-21	Remove address from GPLv2 headers	Patrick Georgi
2015-04-18	kconfig: automatically include mainboards	Stefan Reinauer
2015-04-17	uart: pass register width in the coreboot table	Vadim Bendebury
2015-04-14	CBFS: Automate ROM image layout and remove hardcoded offsets	Julius Werner
2015-04-06	New mechanism to define SRAM/memory map with automatic bounds checking	Julius Werner
2015-03-20	bootblocks: use run_romstage()	Aaron Durbin
2015-03-20	romstages: use common run_ramstage()	Aaron Durbin
2014-12-04	RISCV: get RISCV to build again	Ronald G. Minnich
2014-12-01	Add UCB RISCV support for architecture, soc, and emulation mainboard..	Ronald G. Minnich