Age | Commit message (Expand) | Author |
2017-09-27 | mb/emu/*-riscv: Remove outdated memory map | Jonathan Neuschäfer |
2017-02-23 | mb/emulation/*-riscv: Don't select ARCH_BOOTBLOCK_RISCV | Jonathan Neuschäfer |
2016-11-07 | riscv: Unify SBI call implementations under arch/riscv/ | Jonathan Neuschäfer |
2016-10-24 | RISCV: Clean up the common architectural code | Ronald G. Minnich |
2016-10-15 | riscv: Use the generic src/lib/bootblock.c | Jonathan Neuschäfer |
2016-10-15 | riscv: Clean up {qemu,spike}_util | Jonathan Neuschäfer |
2016-10-15 | riscv and power8: Convert printk/while(1) to die | Jonathan Neuschäfer |
2016-08-19 | qemu-riscv: Remove obsolete CSR - send_ipi | Martin Roth |
2016-08-18 | Kconfig: lay groundwork for not assuming SPI flash boot device | Aaron Durbin |
2016-08-02 | arch/riscv: Add include/arch/barrier.h | Jonathan Neuschäfer |
2016-07-14 | spike-riscv: Look for the CBFS in RAM | Jonathan Neuschäfer |
2016-06-17 | Define RAMTOP for x86 only | Kyösti Mälkki |
2016-04-28 | Add board URLs for the RISC-V boards | Jonathan Neuschäfer |
2015-10-31 | tree: drop last paragraph of GPL copyright header | Patrick Georgi |
2015-09-16 | riscv-memlayout: fix existing memlayout issues, add sbi interface | Thaminda Edirisooriya |
2015-06-08 | Remove empty lines at end of file | Elyes HAOUAS |
2015-05-21 | Remove address from GPLv2 headers | Patrick Georgi |
2015-04-18 | kconfig: automatically include mainboards | Stefan Reinauer |
2015-04-17 | uart: pass register width in the coreboot table | Vadim Bendebury |
2015-04-14 | CBFS: Automate ROM image layout and remove hardcoded offsets | Julius Werner |
2015-04-06 | New mechanism to define SRAM/memory map with automatic bounds checking | Julius Werner |
2015-03-20 | bootblocks: use run_romstage() | Aaron Durbin |
2015-03-20 | romstages: use common run_ramstage() | Aaron Durbin |
2014-12-04 | RISCV: get RISCV to build again | Ronald G. Minnich |
2014-12-01 | Add UCB RISCV support for architecture, soc, and emulation mainboard.. | Ronald G. Minnich |