coreboot - Some coreboot project code with my work

Age	Commit message (Expand)	Author
2018-11-28	mb///Kconfig: Remove useless comment	Elyes HAOUAS
2018-10-29	Documentation/mainboard: Add emulation/spike-riscv.md	Jonathan Neuschäfer
2018-10-22	mainboard/: Select MISSING_BOARD_RESET appropriately	Nico Huber
2018-10-06	mb/emulation/*-riscv: Remove "UCB" from RISC-V board names	Jonathan Neuschäfer
2018-06-09	mainboard: Get rid of device_t in ramstage	Elyes HAOUAS
2018-06-02	src/mainboard: Add and update license headers	Martin Roth
2018-04-27	RISC-V boards: Remove PAGETABLES section from memlayout.ld	Jonathan Neuschäfer
2018-04-25	util/riscvtools: Rename to util/riscv/	Jonathan Neuschäfer
2018-02-20	mb/emu/spike-riscv: Move usage instructions into Kconfig help	Jonathan Neuschäfer
2017-11-07	RISC-V boards: Stop using the config string	Jonathan Neuschäfer
2017-09-27	mb/emu/*-riscv: Remove outdated memory map	Jonathan Neuschäfer
2017-06-12	mb/emulation/spike-riscv: Update UART address	Jonathan Neuschäfer
2017-02-23	mb/emulation/*-riscv: Don't select ARCH_BOOTBLOCK_RISCV	Jonathan Neuschäfer
2017-01-16	riscv/spike: Remove obsolete DRAM_SIZE_MB setting	Jonathan Neuschäfer
2016-11-12	riscv: start to use the configstring functions	Ronald G. Minnich
2016-11-07	riscv: Unify SBI call implementations under arch/riscv/	Jonathan Neuschäfer
2016-10-24	RISCV: Clean up the common architectural code	Ronald G. Minnich
2016-10-15	riscv: Use the generic src/lib/bootblock.c	Jonathan Neuschäfer
2016-10-15	riscv: Clean up {qemu,spike}_util	Jonathan Neuschäfer
2016-10-15	riscv and power8: Convert printk/while(1) to die	Jonathan Neuschäfer
2016-08-23	arch/riscv: Implement the SBI again	Jonathan Neuschäfer
2016-08-18	Kconfig: lay groundwork for not assuming SPI flash boot device	Aaron Durbin
2016-08-02	arch/riscv: Add include/arch/barrier.h	Jonathan Neuschäfer
2016-07-14	spike-riscv: Look for the CBFS in RAM	Jonathan Neuschäfer
2016-07-14	spike-riscv: Register RAM resource at 0x80000000	Jonathan Neuschäfer
2016-07-12	spike-riscv: Remove HTIF related code	Jonathan Neuschäfer
2016-06-21	riscv-spike: Move coreboot to 0x80000000 (2GiB)	Jonathan Neuschäfer
2016-06-17	Define RAMTOP for x86 only	Kyösti Mälkki
2016-06-12	riscv-spike: Replace custom UART with a memory-mapped 8250	Jonathan Neuschäfer
2016-04-28	Add board URLs for the RISC-V boards	Jonathan Neuschäfer
2016-04-28	Fix "Spike RISCV" board name	Jonathan Neuschäfer
2015-10-31	tree: drop last paragraph of GPL copyright header	Patrick Georgi
2015-09-16	riscv-memlayout: fix existing memlayout issues, add sbi interface	Thaminda Edirisooriya
2015-09-10	riscv-trap-handling: Add implementation for trap calls in riscv	Thaminda Edirisooriya
2015-08-09	riscv-spike: support for Spike emulation of riscv	Thaminda Edirisooriya