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Some coreboot project code with my work
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romstage.c
Age
Commit message (
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Author
2016-06-21
intel/car/cache_as_ram.inc: Prepare for dynamic CONFIG_RAMTOP
Kyösti Mälkki
2016-03-10
northbridge/intel/i440bx: Unify UDELAY selection
Stefan Reinauer
2015-10-31
tree: drop last paragraph of GPL copyright header
Patrick Georgi
2015-05-21
Remove address from GPLv2 headers
Patrick Georgi
2015-01-06
mainboard/*/romstage.c: Fix 'lib/delay.c' inclusion
Edward O'Callaghan
2015-01-06
mainboard/*/romstage.c: Sanitize system header inclusions
Edward O'Callaghan
2014-12-02
Replace hlt with halt()
Patrick Georgi
2014-08-15
intel/cpu: rename car.h to romstage.h
Aaron Durbin
2014-08-14
Intel: Add common header file for CAR setup
Edward O'Callaghan
2014-05-11
superio/ite/*: Factor out generic romstage component
Edward O'Callaghan
2013-03-22
x86: Unify arch/io.h and arch/romcc_io.h
Stefan Reinauer
2013-03-01
GPLv2 notice: Unify all files to just use one space in »MA 02110-1301«
Paul Menzel
2012-04-27
Move top level pc80 directory to drivers/
Stefan Reinauer
2011-04-20
run uart_init() from console_init, just like the other console initialization...
Stefan Reinauer
2010-12-27
Fix most CONFIG_DEBUG_RAM_SETUP issues.
Stefan Reinauer
2010-12-08
second round name simplification. drop the <component>_ prefix.
stepan
2010-12-07
Get rid of some unneeded function prototypes in romstage.c files.
Uwe Hermann
2010-10-09
Remove various .c #includes from Intel 440BX/82371EB boards.
Uwe Hermann
2010-10-07
Convert all Intel 82371AB/EB/MB based boards to TINY_BOOTBLOCK.
Uwe Hermann
2010-10-06
Convert all Intel 440BX boards to Cache-as-RAM (CAR).
Uwe Hermann
2010-05-14
ITE IT8671F: Add it8671f_48mhz_clkin().
Anders Jenbo
2010-05-14
Add initial support for the GIGABYTE GA-6BXE.
Anders Jenbo