coreboot - Some coreboot project code with my work

Age	Commit message (Expand)	Author
2020-01-02	mb///acpi_tables: Remove unused includes	Elyes HAOUAS
2019-12-31	mb///acpi_tables: Don't zero out gnvs again	Peter Lemenkov
2019-12-31	mb/**/dsdt.asl: Remove outdated sleepstates.asl comment	Angel Pons
2019-12-27	mb///early_init.c: Remove defined but not used macro	Elyes HAOUAS
2019-12-16	arch/x86: Make X86 stages select ARCH_X86	Arthur Heymans
2019-11-15	nb/intel/x4x: Move to C_ENVIRONMENT_BOOTBLOCK	Arthur Heymans
2019-11-15	nb/intel/x4x: Move boilerplate romstage to a common location	Arthur Heymans
2019-11-14	mb//(ich7/x4x): Use common early southbridge init	Arthur Heymans
2019-11-12	sb/intel/i82801gx: Add common LPC decode code	Arthur Heymans
2019-11-11	mb/{x4x}: Remove unused 'include <northbridge/intel/x4x/iomap.h>'	Elyes HAOUAS
2019-11-04	mb//{i82801gx}: Use sb/intel/common/acpi/platform.asl	Arthur Heymans
2019-11-01	soc/intel/{IA-CPU/SOC}: Move sleepstates.asl into southbridge/intel/common/acpi	Subrata Banik
2019-10-11	sb/intel/i82801gx: Move CIR init to a common place	Arthur Heymans
2019-08-26	soc/intel: Use common romstage code	Kyösti Mälkki
2019-08-18	cpu/intel: Enter romstage without BIST	Kyösti Mälkki
2019-07-20	mb/,sb/intel/i82801gx: Merge `ide_legacy_combined` into `sata_mode`	Nico Huber
2019-06-06	sb/intel/i82801gx: Detect if the southbridge supports AHCI	Arthur Heymans
2019-06-05	mb/*/devicetree.cb: Remove unavailable PCIe ports	Arthur Heymans
2019-04-13	sb/intel/i82801gx: Use SOUTHBRIDGE_INTEL_COMMON_PMCLIB	Patrick Rudolph
2019-03-13	src/mainboard///cstates.c: Drop unused includes	Elyes HAOUAS
2019-03-13	{mb,nb/pineview}/*.asl: Remove unneeded include i82801gx.h	Elyes HAOUAS
2019-03-04	arch/io.h: Drop unnecessary include	Kyösti Mälkki
2019-03-01	device/pci: Fix PCI accessor headers	Kyösti Mälkki
2019-02-07	src: Remove unused include device/pnp_def.h	Elyes HAOUAS
2019-01-23	nb/intel/x4x: Use parallel MP init	Arthur Heymans
2019-01-10	mb: Move timestamp_add_now to northbridge x4x	Elyes HAOUAS
2019-01-09	cpu/intel: Use the common code to initialize the romstage timestamps	Arthur Heymans
2019-01-08	sb/intel/i82801gx: Autodisable functions based on devicetree	Arthur Heymans
2019-01-08	mb/{ga-g41m-es2l,d945gclf,rk886ex}: Fix devicetree	Arthur Heymans
2018-12-28	arch/x86: Drop spurious arch/stages.h includes	Kyösti Mälkki
2018-11-23	mb: Set coreboot as DSDT's manufacturer model ID	Elyes HAOUAS
2018-11-21	ACPI: Fix DSDT's revision field	Elyes HAOUAS
2018-11-12	mb//: Harmonise FD and devicetree on boards featuring ICH7	Arthur Heymans
2018-08-15	mb///cmos.default: Decrease debug_level to 'Debug'	Elyes HAOUAS
2018-08-13	mb: Get rid of unneeded include <cbmem.h>	Elyes HAOUAS
2018-06-29	sb/intel/i82801{g,j}x: Automatically generate ACPI PIRQ tables	Arthur Heymans
2018-06-14	nb/intel/x4x: Deprecate native graphic init	Arthur Heymans
2018-06-14	mb//: Enable libgfxinit on x4x boards	Arthur Heymans
2018-06-12	drivers/intel/gma: Unify VBT related Kconfig names	Nico Huber
2018-06-11	mb///acpi_tables.c: Remove unneeded includes	Elyes HAOUAS
2018-06-06	mb//: Add a few VBT files	Arthur Heymans
2018-06-04	mb/gigabyte: Get rid of whitespace before tab	Elyes HAOUAS
2018-05-01	nb/intel/x4x: Change memory layout to improve MTRR	Arthur Heymans
2018-01-26	mb///cmos.layout: Fix the values for the console level	Arthur Heymans
2018-01-14	mb///romstage.c: Clean up targets with i82801gx	Arthur Heymans
2018-01-05	nb/intel/x4x: Disable watchdog, halt TCO timer and clear timeout	Arthur Heymans
2017-10-22	superio/ite/common: Add temperature offset	Vagiz Trakhanov
2017-09-23	mb//: Remove rtc nvram configurable baud rate	Arthur Heymans
2017-06-02	Kconfig: Rework MAINBOARD_HAS_NATIVE_VGA_INIT_TEXTMODECFG	Nico Huber
2017-05-21	mb/gigabyte/ga-g41m-es2l: Enable IO decode range for LPT and FDD	Arthur Heymans