coreboot - Some coreboot project code with my work

Age	Commit message (Expand)	Author
2010-10-07	Remove duplicate line from pci_ids.h.	Jonathan Kollasch
2010-10-05	- move EHCI_BAR_INDEX to ehci.h - it's constant as per EHCI spec 2.3.1	Patrick Georgi
2010-10-05	Remove lib/ramtest.c-include from all CAR boards.	Patrick Georgi
2010-10-02	Allow selecting the physical USB Debug Port on AMD SB700.	Uwe Hermann
2010-10-01	Move CACHE_AS_RAM_ADDRESS_DEBUG out of romstage.c into Kconfig,	Patrick Georgi
2010-09-28	Remove redundant HW_MEM_HOLE_SIZEK and HW_MEM_HOLE_SIZE_AUTO_INC settings.	Myles Watson
2010-09-25	Drop some useless "../../../" in #includes (trivial).	Uwe Hermann
2010-09-24	Hook up all AMD SB600/SB700 boards to the EHCI Debug Port infrastructure.	Uwe Hermann
2010-09-10	Move memory type information out of some AMD sockets.	Myles Watson
2010-09-07	Remove unused ide0_enable and sata0_enable entries from SB7xx	Rudolf Marek
2010-08-30	We call this cache as ram everywhere, so let's call it the same in Kconfig	Stefan Reinauer
2010-08-30	Restructured all vendors' Kconfig files to no longer source the boards'	Jens Rottmann
2010-08-26	Remove unused mainboard_config definitions. Trivial.	Myles Watson
2010-08-17	Add support for Gigabyte MA785GMT mainboard.	Wang Qing Pei