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path: root/src/mainboard/gigabyte
AgeCommit message (Expand)Author
2019-12-19mb/*/*/early_init.c: Remove unused <device/pci_{def,ops}.h>Elyes HAOUAS
2019-12-16arch/x86: Make X86 stages select ARCH_X86Arthur Heymans
2019-12-12mb/**/hda_verb.c: Clean up formattingAngel Pons
2019-12-11mb/**/hda_verb.c: use denary numerals for lengthsAngel Pons
2019-12-10mainboard/(i945,ich7): Remove commented RCBA32(0x341c) codeElyes HAOUAS
2019-12-09mb/gigabyte/ga-b75m-d3h: Add ga-b75-d3v as a variantBill XIE
2019-11-23Kconfig: comply to Linux 5.3's Kconfig language rulesPatrick Georgi
2019-11-20mb/*/*: Drop AMDFAM10 mainboardsArthur Heymans
2019-11-18mb/gigabyte/ga-b75m-d3h: Drop useless function-disable settingNico Huber
2019-11-18mb/{gigabyte,lenovo}: Remove spurious setting of ETR3 bit 16Nico Huber
2019-11-18nb/intel/sandybridge: Set up console in bootblockArthur Heymans
2019-11-18nb/intel/sandybridge: Move to C_ENVIRONMENT_BOOTBLOCKArthur Heymans
2019-11-18sb/intel/bd82x6x: Make the pch_enable_lpc hook optionalArthur Heymans
2019-11-18nb/intel/sandybridge: Make the mainboard_rcba_config hook optionalArthur Heymans
2019-11-18nb/intel/sandybridge: Make the mainboard_early_init hook optionalArthur Heymans
2019-11-15nb/intel/x4x: Move to C_ENVIRONMENT_BOOTBLOCKArthur Heymans
2019-11-15nb/intel/i945: Initialize console in bootblockArthur Heymans
2019-11-15nb/intel/i945: Move boilerplate romstage to a common locationArthur Heymans
2019-11-15nb/intel/x4x: Move boilerplate romstage to a common locationArthur Heymans
2019-11-14mb/*/*(ich7/x4x): Use common early southbridge initArthur Heymans
2019-11-14sb/intel/i82801gx: Add common early codeArthur Heymans
2019-11-12sb/intel/i82801gx: Add common LPC decode codeArthur Heymans
2019-11-11mb/{x4x}: Remove unused 'include <northbridge/intel/x4x/iomap.h>'Elyes HAOUAS
2019-11-04mb/*/*{i82801gx}: Use sb/intel/common/acpi/platform.aslArthur Heymans
2019-11-04mb/*/*{bd82x6x/ibexpreak}: Use sb/intel/common/acpi/platform.aslArthur Heymans
2019-11-01soc/intel/{IA-CPU/SOC}: Move sleepstates.asl into southbridge/intel/common/acpiSubrata Banik
2019-10-27mb/gigabyte: Use 'Device()' instead of 'Processor()'Elyes HAOUAS
2019-10-27mb/(ich7): Use macro instead of magic numberElyes HAOUAS
2019-10-16sb/intel/bd82x6x/lpc: Set up default LPC decode rangesArthur Heymans
2019-10-11sb/intel/i82801gx: Move CIR init to a common placeArthur Heymans
2019-09-22mb/gigabyte/ga-h61m-s2pv: Improve LPC decodingAngel Pons
2019-08-26soc/intel: Use common romstage codeKyösti Mälkki
2019-08-18cpu/intel: Enter romstage without BISTKyösti Mälkki
2019-08-18mainboards: Remove floating __PRE_RAM__ commentsKyösti Mälkki
2019-07-20mb/,sb/intel/i82801gx: Merge `ide_legacy_combined` into `sata_mode`Nico Huber
2019-07-19sb/intel/{bd82x6x|ibexpeak}: Drop p_cnt_throttling_supportedPatrick Rudolph
2019-07-04amdfam10: Declare get_sysinfo()Kyösti Mälkki
2019-07-04amdfam10: Declare empty activate_spd_rom() stubKyösti Mälkki
2019-06-24mb/gigabyte/ga-h61ma-d3v: Add new mainboard as variantAngel Pons
2019-06-21sb/intel/bd82x6x: Set up io_gen_dec in romstage based on devicetreeArthur Heymans
2019-06-17src/mb/gigabyte/ga-h61m-s2pv: Correct devicetreeAngel Pons
2019-06-14nb/i945: Drop CHANNEL_XOR_RANDOMIZATION selectionElyes HAOUAS
2019-06-06sb/intel/i82801gx: Detect if the southbridge supports AHCIArthur Heymans
2019-06-05mb/*/devicetree.cb: Remove unavailable PCIe portsArthur Heymans
2019-05-29mb/gigabyte/ga-b75m-d3{h,v}: Switch to variant setupAlex James
2019-05-16mb/gigabyte/ga-b75m-d3{h,v}: Various cleanupsAlex James
2019-05-12nb/intel/snb: Drop NORTHBRIDGE_INTEL_IVYBRIDGENico Huber
2019-04-19src/mb/Kconfig: Fix PCI subsystem IDsElyes HAOUAS
2019-04-13sb/intel/i82801gx: Use SOUTHBRIDGE_INTEL_COMMON_PMCLIBPatrick Rudolph
2019-03-24nb/intel/i945: Use DEBUG_RAM_SETUPKyösti Mälkki