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Some coreboot project code with my work
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bolt
Age
Commit message (
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Author
2014-05-03
Move ARCH_* from board/Kconfig to cpu or soc Kconfig.
Furquan Shaikh
2014-05-01
ChromeOS: Use common fill_lb_gpio()
Kyösti Mälkki
2014-05-01
ChromeOS: Remove oprom_is_loaded
Kyösti Mälkki
2014-03-28
mainboard/*/*/ec.c: Do not include `chromeos/chromeos.h`
Paul Menzel
2014-02-25
Remove CACHE_ROM.
Vladimir Serbinenko
2014-02-12
google boards: Do not hardcode location of spd.bin
Alexandru Gagniuc
2014-02-06
MTRR: Mark all prefetchable resources as WRCOMB.
Vladimir Serbinenko
2014-01-22
board_info.txt: Classify almost all remaining boards.
Vladimir Serbinenko
2014-01-12
CBFS: use cbfs_get_file_content whenever possible rather than cbfs_get_file
Vladimir Serbinenko
2013-12-24
Remove PCI_ROM_RUN option
Vladimir Serbinenko
2013-12-23
Coding style: punctuation cleanup [1/2].
Idwer Vollering
2013-12-21
haswell boards: Use PECI temp sensor id 0
Duncan Laurie
2013-12-21
bolt: make the gpio interrupts edge sensitive
Aaron Durbin
2013-12-12
bolt: Initial mainboard commit
Duncan Laurie
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