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path: root/src/mainboard/google/dedede/variants
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2020-09-15mb/google/dedede/var/magolor: Add touch screen devicesRen Kuo
add the magolor touch screen ctrl devices: 1)elan 6915 2)elan 5012 3)raydium RM32680 BUG=b:166711761 BRANCH=None TEST=build firmware and verify the touch functions on DUT Signed-off-by: Ren Kuo <ren.kuo@quanta.corp-partner.google.com> Change-Id: Icd2963317e858f7d35c937e45cd6f3e556bbb953 Reviewed-on: https://review.coreboot.org/c/coreboot/+/45227 Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Henry Sun <henrysun@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-09-14mb/google/dedede/var/boten: Add audio configurationKarthikeyan Ramasubramanian
Add configuration for ALC5682 headphone jack and ALC1015 speaker amplifier. Also turn on the HDA PCI device. BUG=b:161667665 TEST=Build the boten board and verified the audio functionality. Change-Id: I835db854543e6282c102c86a7073b432fd89d0a5 Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/44920 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Justin TerAvest <teravest@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-09-14mb/google/dedede/variants/drawcia: Increase PL2 value from 15W to 20WSumeet R Pawnikar
Jasper Lake SoC supports PL2 (Power Limit2) as 20W. Increase PL2 value from 15W to 20W. BRANCH=None BUG=b:166656373 TEST=Built and tested on drawlat system Change-Id: I82d6792907bb1c88cc9dd57d1eaeda8421c12fb2 Signed-off-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/45162 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-09-11mb/google/dedede/var/drawcia: Remove debug statement with NULL pointerKarthikeyan Ramasubramanian
The debug statement to print WiFi SAR file can potentially have a NULL pointer. Also the debug statement does not add much value. Hence remove the debug statement. BUG=b:165613510 TEST=Build and boot the drawcia board to OS. Change-Id: I710240f5e965f523fb8ac55a67880e1cbf9abd48 Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/45298 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Justin TerAvest <teravest@chromium.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
2020-09-11mb/google/dedede/var/drawcia: Add Wifi SAR for drawciaWisley Chen
drawman/drawlat/drawcia share the same coreboot, and only drawcia is convertible. Use tablet mode of fw config to decide to load custom wifi sar or not. BUG=b:165613510 TEST=enable CHROMEOS_WIFI_SAR in config of coreboot, emerge-dedede coreboot-private-files-baseboard-dedede coreboot chromeos-bootimage. Change-Id: Ibcd498021e63d0a172c71c3d94b60b3a25973467 Signed-off-by: Wisley Chen <wisley.chen@quantatw.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/44661 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
2020-09-11mb/google/dedede: Enable FW_CONFIGWisley Chen
Enable FW_CONFIG and add tablet mode field in devicetree BUG=b:165613510 TEST=emerge-dedede coreboot Signed-off-by: Wisley Chen <wisley.chen@quantatw.com> Change-Id: I55e4c0d0b4aa2337c01773006d0b485fdcd91654 Reviewed-on: https://review.coreboot.org/c/coreboot/+/45185 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
2020-09-08mb/google/dedede/var/drawcia: Configure I2C high and low timeKarthikeyan Ramasubramanian
Configure the I2C bus high and low time for all enabled I2C buses. BUG=b:162232776 TEST=Measured the I2C bus frequency as 389 KHz, high time as 870 ns and low time as 1580 ns. Change-Id: I67d2725a7fc8d83e3fa8a56cfa86540c4e6f0971 Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/45084 Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-09-08mb/google/dedede/var/waddledee: Configure I2C high and low timeKarthikeyan Ramasubramanian
Configure the I2C bus high and low time for all enabled I2C buses. BUG=b:163743035 TEST=Measured the I2C bus frequency as 384 KHz, high time as 924 ns and low time as 1680 ns. Change-Id: I60a5f6814fb9818c724f6b6fe465ea49d0de0f97 Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/45083 Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-09-06mb/*: devicetree: drop now unneeded USBx_PORT_EMPTYMichael Niewöhner
Setting USBx_PORT_EMPTY is not a requirement anymore, since unset devicetree settings default to 0 and the OC pin now only gets set when the USB port is enabled (see CB:45112). Thus, drop the setting from all devicetrees. Change-Id: I899349c49fa7de1c1acdca24994ebe65c01d80c6 Signed-off-by: Michael Niewöhner <foss@mniewoehner.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/45125 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Singer <felixsinger@posteo.net>
2020-08-31mb/google/dedede/var/drawcia: Add elan USI touchscreenWisley Chen
BUG=b:155002684 TEST=emerge-dedede coreboot chromeos-bootimage Change-Id: I87d8575131e745dec818bc5864ca6b21ce0825af Signed-off-by: Wisley Chen <wisley.chen@quantatw.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/44660 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
2020-08-28util: rename lp4x spds to include "lp4x-" in nameNick Vaccaro
Change lp4x spd names to include lp4x memory type (eg. lp4x-spd-1.hex). BUG=b:160157545 TEST=run gen_part_id for volteer variants and verify that it changed spd names to prepend the "lp4x-" to the filename.. Change-Id: I0c59da7eb78f34640aad2e852ca725d3e8571a8e Signed-off-by: Nick Vaccaro <nvaccaro@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/44784 Reviewed-by: Furquan Shaikh <furquan@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-08-24mb/google/dedede/var/drawcia: Add Goodix touchscreenWisley Chen
BUG=b:155002684 TEST=emerge-dedede coreboot chromeos-bootimage Change-Id: I89a4a5bbcd26b156a9660f80090bb5c953196b84 Signed-off-by: Wisley Chen <wisley.chen@quantatw.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/44635 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Justin TerAvest <teravest@chromium.org> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
2020-08-24mb/google/dedede/var/magolor: Add device settingsRen Kuo
Add the configuration in device tree: 1. Add HDA,speaker codec and speaker amp setting 2. Add Elan and Goodix touchscreen setting 3. Add user facing camera usb setting 4 Add Synaptics and Elan Touchpad setting 5. Add WiFi configuration BUG=None BRANCH=None TEST=build magolor firmware Change-Id: Ifc562b4a05c8955d2aec105f2f429f926ad1e702 Signed-off-by: Ren Kuo <ren.kuo@quanta.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/44633 Reviewed-by: Karthik Ramasubramanian <kramasub@google.com> Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-08-24mb/google/dedede/variants/drawcia: add charger input current throttlingSumeet R Pawnikar
Add charger input current throttling for drawcia system BUG=None BRANCH=None TEST=Built and tested on drawcia system Change-Id: I34fdc23fcd84b5c27c2bada769f7a9049c2a56a5 Signed-off-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/44546 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
2020-08-21mb/google/dedede: Enable IPU for Wdoo and Wdee variantsMaulik V Vaghela
IPU is required to be enabled for platform supporting MIPI camera. IPU is by default disabled in devicetree for all variants. Enable IPU for Waddledoo and Waddledee supporting MIPI camera. BUG=None BRANCH=None TEST=IPU is enabled for platforms and enumerates in lspci. Change-Id: Ia3cf06d78be4301c68bfa8b1118ddff231d24a66 Signed-off-by: Maulik V Vaghela <maulik.v.vaghela@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/44271 Reviewed-by: Aamir Bohra <aamir.bohra@intel.com> Reviewed-by: Ronak Kanabar <ronak.kanabar@intel.com> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-08-18mb/google/dedede: Fix S3 wake using trackpadMeera Ravindranath
Configure TRACKPAD_INT_ODL pad reset config to DEEP and map PMC_GPE_DW to PMC_GPP values. TEST=System should wake from S3 via trackpad Change-Id: I58ce3720e0fdeefb2c9440bb3006897ef80211ea Signed-off-by: Meera Ravindranath <meera.ravindranath@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/43949 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com> Reviewed-by: Aamir Bohra <aamir.bohra@intel.com> Reviewed-by: Subrata Banik <subrata.banik@intel.com>
2020-08-17mb/google/dedede/var/magolor: Generate SPD ID for supported partsRen Kuo
Add supported memory parts in the mem_list_variant.txt and generate the SPD ID for the parts. The memory parts being added are: MT53E512M32D2NP-046 WT:E K4U6E3S4AA-MGCR H9HCNNNBKMMLXR-NEE MT53E1G32D2NP-046 WT:A K4UBE3D4AA-MGCR And also remove the deprecated by cl#43989 https://review.coreboot.org/c/coreboot/+/43989 BUG=None TEST=Build the magolor board Signed-off-by: Ren Kuo <ren.kuo@quanta.corp-partner.google.com> Change-Id: I3348b7fbeff038b85e7d3c9137517e05a35bf3dd Reviewed-on: https://review.coreboot.org/c/coreboot/+/44408 Reviewed-by: Karthik Ramasubramanian <kramasub@google.com> Reviewed-by: Marco Chen <marcochen@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-08-17mb/google/dedede: Update the SLP_Sx assertion widths and PwrCycDurV Sowmya
This patch updates the SLP_Sx assertion width and power cycle duration for the dedede platforms. Power cycle duration: With default value, S0->S5 -> [ ~4.2 seconds delay ] -> S5->S0 With value set to 1, S0->S5 -> [ ~1.2 seconds delay ] -> S5->S0 BUG=b:159104150 TEST=Verified that the power cycle duration is ~1.2s with global reset on waddledoo. Change-Id: I7079cbd564288b5d5b69e07661434439365063d3 Signed-off-by: V Sowmya <v.sowmya@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/43792 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aamir Bohra <aamir.bohra@intel.com> Reviewed-by: Sridhar Siricilla <sridhar.siricilla@intel.com> Reviewed-by: Maulik V Vaghela <maulik.v.vaghela@intel.com> Reviewed-by: Ronak Kanabar <ronak.kanabar@intel.com> Reviewed-by: Subrata Banik <subrata.banik@intel.com>
2020-08-12mb/google/dedede/variants/drawcia: add DTT supportSumeet R Pawnikar
Add DTT (Dynamic Tuning Technology) support on Jasper Lake based drawcia system. Add information on sensors, power limits and tcc_offset for DTT based thermal control. BRANCH=None BUG=b:161993459 TEST=Built for dedede system Change-Id: If50052864fb246a6a8f7d96fa50529e5f55968c0 Signed-off-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/44148 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
2020-08-04mb/**/{devicetree,overridetree}.cb: Indent with tabsAngel Pons
Use tabs instead of eight (sometimes less) spaces. Change-Id: Ic3d61f5210d21d9613fc50b47b90af71f544169a Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/44113 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
2020-08-03mb/google/dedede: Update CPU critical temperatureSumeet R Pawnikar
Observed thermal shutdown initiated by DPTF due to CPU temperature reaching critical temperature trip value. During stress testing with heavy workload like WebGL Aquarium, sometime CPU temperature spikes till 99 degree Celsius and DPTF initiates system shutdown. This updates CPU critical temperature trip value to 105 degree Celsius to avoid system shutdown. BUG=b:161993459 BRANCH=None TEST=Built and tested on dedede system Change-Id: If15a873a997aa80f20940f27bbafd4498908c091 Signed-off-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/44054 Reviewed-by: Karthik Ramasubramanian <kramasub@google.com> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-08-03mb/google/dedede/var/madoo: Add discrete WiFi configurationDtrain Hsu
Add RTL8822CE support for Madoo. BUG=b:162390420 BRANCH=None TEST=FW_NAME=madoo emerge-dedede coreboot chromeos-bootimage, build successful Signed-off-by: Dtrain Hsu <dtrain_hsu@compal.corp-partner.google.com> Change-Id: I6e471be2b2856977e6f728d5a2ca78942725bea6 Reviewed-on: https://review.coreboot.org/c/coreboot/+/44056 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com> Reviewed-by: EricR Lai <ericr_lai@compal.corp-partner.google.com> Reviewed-by: Justin TerAvest <teravest@chromium.org>
2020-08-03mb/google/dedede/var/madoo: Support Elan touchpad and configure I2C portsDtrain Hsu
1. Add Elan touchpad support. 2. Follow schematic to disable I2C1 and I2C3. BUG=b:160869188,b:161407664 BRANCH=NONE TEST=emerge-dedede coreboot chromeos-bootimage", build successful Signed-off-by: Dtrain Hsu <dtrain_hsu@compal.corp-partner.google.com> Change-Id: I154a1ff2597968d200d1d0693718f90cd2744616 Reviewed-on: https://review.coreboot.org/c/coreboot/+/44052 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com> Reviewed-by: EricR Lai <ericr_lai@compal.corp-partner.google.com> Reviewed-by: Justin TerAvest <teravest@chromium.org>
2020-08-03mb/google/dedede/var/madoo: Enable Goodix touchscreenIan Feng
Add Goodix touchscreen support. BUG=b:160868197 BRANCH=None TEST=emerge-dedede coreboot chromeos-bootimage", build successful Signed-off-by: Ian Feng <ian_feng@compal.corp-partner.google.com> Change-Id: I9bf27d69d0895cb4ea8620a6da49e98d25e05c23 Reviewed-on: https://review.coreboot.org/c/coreboot/+/44012 Reviewed-by: Karthik Ramasubramanian <kramasub@google.com> Reviewed-by: Justin TerAvest <teravest@chromium.org> Reviewed-by: EricR Lai <ericr_lai@compal.corp-partner.google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-07-30mb/google/dedede: Add Goodix touchscreenEvan Green
Add overridetree info for the touchscreen. BUG=b:160129126 TEST=cros flash-ap -b dedede Signed-off-by: Evan Green <evgreen@chromium.org> Change-Id: I55fc0749b824a0bf4b615d02bd8bc39bcdd589e0 Reviewed-on: https://review.coreboot.org/c/coreboot/+/43153 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
2020-07-29mb/google/dedede/var/magalor: Generate SPD ID for supported partsKarthikeyan Ramasubramanian
Add supported memory parts in the mem_list_variant.txt and generate the SPD ID for the parts. The memory part being added is: MT53E512M32D2NP-046 WT:E K4U6E3S4AA-MGCR H9HCNNNBKMMLXR-NEE MT53E1G32D2NP-046 WT:A K4UBE3D4AA-MGCR BUG=None TEST=Build the magalor board. Change-Id: I7bb19d6d4a66e66fed0564592c803c2af1045b0c Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/43989 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
2020-07-28mb/google/dedede/var/madoo: Generate SPD ID for supported partsDtrain Hsu
Add supported memory parts in the mem_list_variant.txt and generate the SPD ID for the parts. The memory parts being added are: H9HCNNNBKMMLXR-NEE MT53E512M32D2NP-046 WT:E K4U6E3S4AA-MGCR BUG=b:161215903 BRANCH=NONE TEST=FW_NAME=madoo emerge-dedede coreboot chromeos-bootimage Signed-off-by: Dtrain Hsu <dtrain_hsu@compal.corp-partner.google.com> Change-Id: Ib61af2399541c4caf4a310a34e778e0ba1cbd3ab Reviewed-on: https://review.coreboot.org/c/coreboot/+/43802 Reviewed-by: Karthik Ramasubramanian <kramasub@google.com> Reviewed-by: EricR Lai <ericr_lai@compal.corp-partner.google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-07-28mb/google/dedede/var/madoo: Add audio support (ALC5682, MX98360A)Dtrain Hsu
Select the drivers for ALC5682 codec and MX98360A spk amp BUG=b:161407664 BRANCH=NONE TEST=FW_NAME=madoo emerge-dedede coreboot chromeos-bootimage Signed-off-by: Dtrain Hsu <dtrain_hsu@compal.corp-partner.google.com> Change-Id: Ibe3d878b1058bfae4143d96be854884e61394ad5 Reviewed-on: https://review.coreboot.org/c/coreboot/+/43801 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
2020-07-28mb/google/dedede/var/madoo: Configure USB port setting for MadooDtrain Hsu
Follow schematic to modify USB port setting and clean up I2C clock tuning. USB2 [0]: USB Type C Port 0 USB2 [1]: USB Type C Port 1 USB2 [2]: None USB2 [3]: USB Type A Port 1 USB2 [4]: None USB2 [5]: Camera USB2 [6]: None USB2 [7]: WLAN module - BlueTooth USB3 [0]: USB Type C Port 0 (M/B side) USB3 [1]: USB Type C Port 1 (Sub/B side) USB3 [2]: None USB3 [3]: USB Type A Port 1 USB3 [4]: None USB3 [5]: None BUG=b:161407664 BRANCH=NONE TEST=Build the coreboot image on madoo board. Signed-off-by: Dtrain Hsu <dtrain_hsu@compal.corp-partner.google.com> Change-Id: Ia73593f52adee3806e725127891f084a08bf1360 Reviewed-on: https://review.coreboot.org/c/coreboot/+/43750 Reviewed-by: EricR Lai <ericr_lai@compal.corp-partner.google.com> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-07-28mb/google/dedede/var/madoo: Configure GPIO for MadooDtrain Hsu
Follow schematic to modify some GPIO pins. GPP_D12 - NC Pin GPP_D13 - NC Pin GPP_D14 - NC Pin GPP_D15 - NC Pin GPP_E0 - NC Pin GPP_E2 - NC Pin GPP_H6 - NC Pin GPP_H7 - NC Pin GPP_S02 - NC Pin GPP_S03 - NC Pin BUG=b:161407664 BRANCH=NONE TEST=Build the coreboot image on madoo board. Signed-off-by: Dtrain Hsu <dtrain_hsu@compal.corp-partner.google.com> Change-Id: I85aadfb0d020055eec921c7646c16ae6c95a606f Reviewed-on: https://review.coreboot.org/c/coreboot/+/43745 Reviewed-by: EricR Lai <ericr_lai@compal.corp-partner.google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-07-28mb/google/dedede/var/waddledee: Add discrete WiFi configurationKarthikeyan Ramasubramanian
BUG=b:161734657 TEST=Ensure that the discrete WiFi information is built into ACPI table. Scope (\_SB.PCI0.RP01) { Device (WF00) { Name (_UID, 0x923ACF1C) // _UID: Unique ID Name (_DDN, "WIFI Device") // _DDN: DOS Device Name Name (_ADR, 0x00000000) // _ADR: Address Name (_PRW, Package (0x02) // _PRW: Power Resources for Wake { 0x43, 0x03 }) } } Change-Id: I9a9259e167fc213291b89e151729553ec4649eaf Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/43769 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Furquan Shaikh <furquan@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-07-27mb/google/dedede: Remove Rcomp resistor and target valuesMeera Ravindranath
MRC automatically detects the DDR type and sets Rcomp resistor and target values for JSL and does not require explicit programming. Change-Id: Ia130765e2cb91d6a39ad00ebbab20e7e87fa42d1 Signed-off-by: Meera Ravindranath <meera.ravindranath@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/43761 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2020-07-27dedede: Create magolor variantRen Kuo
Create the magolor variant of the waddledee reference board by copying the template files to a new directory named for the variant. (Auto-Generated by create_coreboot_variant.sh version 4.1.1). BUG=b:58540772 BRANCH=None TEST=util/abuild/abuild -p none -t google/dedede -x -a make sure the build includes GOOGLE_MAGOLOR Signed-off-by: Ren Kuo <ren.kuo@quanta.corp-partner.google.com> Change-Id: I3e39e650b82a0aa629a48a00227700b058effb34 Reviewed-on: https://review.coreboot.org/c/coreboot/+/43803 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
2020-07-26mb/mainboard/dedede: update GPIO table for Botenyan.liu
Adjust GPIO setting to match boten design BUG=b:160741777 BRANCH=NONE TEST=Add gpio.c for boten Signed-off-by: Yan Liu <yan.liu@bitland.corp-partner.google.com> Change-Id: I4eafee608f657f8ec5a06caf6e99b08b3330512b Reviewed-on: https://review.coreboot.org/c/coreboot/+/43277 Reviewed-by: Karthik Ramasubramanian <kramasub@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-07-26mb/google/dedede: Change HDMI DDC GPIOs to native functionMaulik V Vaghela
HDMI DDC GPIOs were configured as NC till now in waddledoo. This may cause HDMI i2c transfer to break and EDID read will fail due to wrong configuration Configuring these GPIOs as NF in coreboot to fix the issue. BUG=b:160324327 BRANCH=None TEST=HDMI works on DDI2 onn Type-C port Change-Id: If02f062132d7c3b01b07ea9401e81f451df35c3c Signed-off-by: Maulik V Vaghela <maulik.v.vaghela@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/43294 Reviewed-by: Ronak Kanabar <ronak.kanabar@intel.com> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-07-26mb/google/dedede/var/drawcia: Add G2Touch touchscreen supportWisley Chen
BUG=b:155002684 TEST=build drawcia, and check touchscreen can work Change-Id: I29a891e07bb3c1d8ebe17666c18bfcf3bc1c361d Signed-off-by: Wisley Chen <wisley.chen@quantatw.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/43551 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Justin TerAvest <teravest@chromium.org> Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
2020-07-26src: Remove extra lines in license headerElyes HAOUAS
Change-Id: I7378aa7d6156ece3ab3959707a69f45886f86d21 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/43593 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-07-23mb/google/dedede/var/waddledoo: Configure stop delay for SiS TSKarthikeyan Ramasubramanian
Reset the Touchscreen (TS) and disable the stop GPIO (report switch) at the same time. Add a delay of 100 ms after disabling the stop GPIO. This will ensure the required delay is inserted for both reset and stop disable GPIOs simultaneously. BUG=b:152936541 TEST=Build and boot the waddledoo mainboard. Ensure that the SiS Touchscreen is functional. Change-Id: Icbfb5e07a28ab72b1ff696ad1183a6c2173dcaac Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/43453 Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Justin TerAvest <teravest@chromium.org> Reviewed-by: Marco Chen <marcochen@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-07-23mb/google/dedede/var/drawcia: Generate SPD ID for supported partsKarthikeyan Ramasubramanian
Add supported memory parts in the mem_list_variant.txt and generate the SPD ID for the parts. The memory parts being added are: H9HCNNNBKMMLXR-NEE K4U6E3S4AA-MGCR BUG=None TEST=Build the drawcia board. Change-Id: Id05c0b2a87b64bfedc761949cbc8ad6cf7dd73a5 Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/43505 Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Justin TerAvest <teravest@chromium.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Marco Chen <marcochen@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-07-23mb/google/dedede: Skip the CPU replacement check for dededeV Sowmya
This patches enables the SkipCpuReplacementCheck config for the dedede baseboard to avoid the forced MRC training for all its variants with the soldered down SOC. BUG=b:160201335 TEST=Build and verify CSE Lite SKU on Waddledoo. Cq-Depend: chrome-internal:3142530 Change-Id: I611e66f74a3b9b090ab5e0d836231643d3f919dc Signed-off-by: V Sowmya <v.sowmya@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/42930 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com> Reviewed-by: Rizwan Qureshi <rizwan.qureshi@intel.com>
2020-07-21mb/google/dedede: Create madoo variantIan Feng
Create the madoo variant of the waddledoo reference board by copying the template files to a new directory named for the variant. (Auto-Generated by create_coreboot_variant.sh version 4.1.1). BUG=b:161191394 BRANCH=None TEST=util/abuild/abuild -p none -t google/dedede -x -a make sure the build includes GOOGLE_MADOO Signed-off-by: Ian Feng <ian_feng@compal.corp-partner.google.com> Change-Id: I6d3f611606f86036d67be9c8b0fda833ab61ecc1 Reviewed-on: https://review.coreboot.org/c/coreboot/+/43440 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org> Reviewed-by: EricR Lai <ericr_lai@compal.corp-partner.google.com> Reviewed-by: Dtrain Hsu <dtrain_hsu@compal.corp-partner.google.com> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
2020-07-20mb/google/dedede: Update link frequency and end point structure for OV9734Pandya, Varshit B
1. Update Link frequency to 180 Mhz 2. Set data-lanes to 1 and 3. Update the clock-lane used by sensor BUG=b:155285666 BRANCH=None TEST=Build and able to capture image using user facing camera. Signed-off-by: Pandya, Varshit B <varshit.b.pandya@intel.com> Change-Id: I164cb6af1003de561be8ce640e7653b7bcb3a22f Reviewed-on: https://review.coreboot.org/c/coreboot/+/42679 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Maulik V Vaghela <maulik.v.vaghela@intel.com>
2020-07-18mb/google/dedede: Convert static DPTF ASL into devicetree entriesTim Wawrzynczak
Since there is now a mechanism to generate DPTF ACPI tables and methods at runtime, dedede should switch to using that instead of raw ASL files. This patch converts the existing .asl files into devicetree entries. Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Change-Id: I6bb6e6e15f50a1e510080e16bbca09dfc5f16b1a Reviewed-on: https://review.coreboot.org/c/coreboot/+/43422 Reviewed-by: Karthik Ramasubramanian <kramasub@google.com> Reviewed-by: EricR Lai <ericr_lai@compal.corp-partner.google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-07-15mb/google/dedede: Enable SIS touchscreen for WaddledeeKarthikeyan Ramasubramanian
Add SiS9813 USI touchscreen support. BUG=b:160129126 TEST="emerge-dedede coreboot chromeos-bootimage", build successful. Change-Id: I42fdc5e8243d2c70c953b2f516c10f84a041c035 Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/43304 Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Justin TerAvest <teravest@chromium.org> Reviewed-by: Marco Chen <marcochen@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-07-12mb/google/dedede: Add ability to provide override GPIO tableKarthikeyan Ramasubramanian
For variants with slightly different GPIO configuration, add support to pass an override GPIO configuration table. BUG=None TEST=Build and boot the waddledee mainboard. Change-Id: I2f1c6dc2ea5499bff96a471c4461339ef01ee19a Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/43279 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
2020-07-12mb/google/dedede/var/drawcia: support internal usb cameraWisley Chen
BUG=b:160741778 TEST=build drawcia, and check camera can be regconized Change-Id: I67bee9773b53451653abd76088d1d4062fe3da8f Signed-off-by: Wisley Chen <wisley.chen@quantatw.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/42929 Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com> Reviewed-by: Justin TerAvest <teravest@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-07-12mb/google/dedede/var/drawcia:Add audio support (ALC5682 codec, MX98360A spk amp)Wisley Chen
Select the drivers for ALC5682 codec and MX98360A spk amp BUG=b:158202026 TEST=FW_NAME=drawcia emerge-dedede coreboot chromeos-bootimage Change-Id: If271f11f10a85ade6f61ff8c25bfafeb67a69af6 Signed-off-by: Wisley Chen <wisley.chen@quantatw.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/42928 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
2020-07-08mb/google/waddledee: Enable AudioMaulik V Vaghela
1. Enable HDA Pci device in devicetree 2. Enable I2C4 in devicetree and fill ACPI information 3. Pass correct IRQ GPIO for headset jack BUG=None BRANCH=None TEST=Audio playback and recording works on Waddledee. Change-Id: I77aaa27bb29460ef834c3dd090ced868f2e99616 Signed-off-by: Maulik V Vaghela <maulik.v.vaghela@intel.com> Signed-off-by: Yong Zhi <yong.zhi@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/41765 Reviewed-by: Karthik Ramasubramanian <kramasub@google.com> Reviewed-by: Justin TerAvest <teravest@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-07-08mb/google/dedede/var/drawcia: add elan touchscreenWisley Chen
BUG=b:155002684 TEST=build drawcia, and check touchscreen can work Change-Id: Ib6a190d2f6fc5132af0e58c6df9919381e88f699 Signed-off-by: Wisley Chen <wisley.chen@quantatw.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/42923 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
2020-07-08mb/google/dedede/var/drawcia: Support Elan touchpadWisley Chen
BUG=b:155002811 TEST=build drawcia, and check touchpad can work. Change-Id: I674236aa6937a0444a85e6b8e2fb9a7925b56f5c Signed-off-by: Wisley Chen <wisley.chen@quantatw.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/42922 Reviewed-by: Karthik Ramasubramanian <kramasub@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
generated by cgit v1.2.3 (git 2.25.1) at 2024-07-15 21:53:19 +0000