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path: root/src/mainboard/google/dedede
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2021-05-21mb/google/dedede/var/drawcia: Support HDMI VBT for DrawperTony Huang
Drawper support LTE+HDMI, so use DB_PORTS_1A_HDMI_LTE to select HDMI VBT output for it. BUG=b:186393848 BRANCH=dedede TEST=Build and boot to OS check HDMI output works. Change-Id: Ibf34cce1e3cbfce8a71dce880c50f85db9295b1e Signed-off-by: Tony Huang <tony-huang@quanta.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/54645 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
2021-05-21mb/google/dedede: Add DB_PORTS FW_CONFIG in devicetreeTony Huang
DB_PORTS_1C_1A_LTE 6 DB_PORTS_1C 7 DB_PORTS_1A_HDMI_LTE 8 BUG=b:186393848 BRANCH=dedede TEST=build pass Change-Id: I8632960d7e538402bf033d07402116dac848f5ac Signed-off-by: Tony Huang <tony-huang@quanta.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/54644 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
2021-05-20mb/google/dedede: move discrete TPM in overridetree for lalalaAaron Durbin
Move discrete TPM in the devicetree to avoid emitting the following message: "Using default TPM ACPI path: '\_SB_.PCI0.LPCB'" There is no corresonding ACPI device for 1f.5 PCI device. Therefore, move the discrete TPM to a device that has the corresponding ACPI device node. Functionality should remain the same. BUG=b:187518267 Change-Id: Ie9ec70336d5651c87f06f8b357abd1bfdb1cc06b Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/54634 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com> Reviewed-by: Aseda Aboagye <aaboagye@google.com>
2021-05-18mb/google/dedede: To support ELAN Touchpad device on I2C0Alex1 Kao
Add ELAN Touchpad device under I2C0 BUG=b:188373661 BRANCH=dedede TEST=emerge-dedede coreboot Signed-off-by: Alex1 Kao <alex1_kao@pegatron.corp-partner.google.com> Change-Id: I15b9cb0d0276b5e2dd06694530cc35e5643efb9d Reviewed-on: https://review.coreboot.org/c/coreboot/+/52936 Reviewed-by: Karthik Ramasubramanian <kramasub@google.com> Reviewed-by: Kirk Wang <kirk_wang@pegatron.corp-partner.google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-05-18mb/google/dedede/var/cret: Enable/disable LTE function based on FW_CONFIGDtrain Hsu
Enable/disable LTE function based on LTE bit of FW_CONFIG. The LTE function settings are included GPIO settings, USB port settings and power off sequence. BUG=b:187797408 BRANCH=dedede TEST=Build and test the change on cret. Signed-off-by: Dtrain Hsu <dtrain_hsu@compal.corp-partner.google.com> Change-Id: Ib926e99aaf9df433a7cff71180ee55431d69f718 Reviewed-on: https://review.coreboot.org/c/coreboot/+/54057 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
2021-05-14mb/google/dedede/var/boten: Modify DPTF parametersStanley Wu
DPTF parameters from thermal team. 1. Modify TSR1 sensor as charge sensor. 2. Modify P-state parameter BUG=b:180641150 BRANCH=dedede TEST=build and verified by thermal team. Change-Id: I43002db61de650d29cd85944a4eaea1b2f99aec4 Signed-off-by: Stanley Wu <stanley1.wu@lcfc.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/52755 Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-05-13mb/google/dedede/var/magolor: Select touchscreen based on SSFC in FW_CONFIGDavid Wu
Select touchscreen(s) based on touchscreen source provisioned in SSFC of CBI (higher 32 bits of FW_CONFIG in coreboot). The reason is to avoid to enable multiple touchscreen ICs with the same slave address. BUG=b:186609348 TEST=build and boot to OS. Change-Id: I087ea677a8865fc8c5b3f7c9773bd7f97924dbb3 Signed-off-by: David Wu <david_wu@quanta.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/52851 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com> Reviewed-by: Marco Chen <marcochen@google.com>
2021-05-12mb/google/dedede/var/metaknight: Update DPTF parametersDavid Wu
Remove TSR2 and use DPTF parameters from internal thermal team. BUG=b:175938681 TEST=build and boot to OS. Signed-off-by: David Wu <david_wu@quanta.corp-partner.google.com> Change-Id: If0ec1ec48b8971efe87f1f8d10332a9c16352122 Reviewed-on: https://review.coreboot.org/c/coreboot/+/54046 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raymond Wong <wongraymond@google.com> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com> Reviewed-by: Evan Green <evgreen@chromium.org> Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com>
2021-05-12mb/google/dedede/var/boten: Probe and enable amplifier operation modeStanley Wu
Probe the fw_config for RT1015 speaker amplifier operation mode and enable it accordingly in the device tree. BUG=b:180570923 BRANCH=dedede TEST=ALC1015Q-VB drive speaker OK Change-Id: I756bfa6f604ed320de9a515821979aa95c869ebf Signed-off-by: Stanley Wu <stanley1.wu@lcfc.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/52319 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
2021-05-12mb/google/dedede: Add GPIO and SPD for pirika supportKirk Wang
Add support for GPIO and SPD driver for pirika BUG=b:184157747 BRANCH=dedede TEST=emerge-dedede coreboot Signed-off-by: Kirk Wang <kirk_wang@pegatron.corp-partner.google.com> Change-Id: Id367a83b04aad62b7deabae99b3f91905a2fc46c Reviewed-on: https://review.coreboot.org/c/coreboot/+/52923 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Alex1 Kao <alex1_kao@pegatron.corp-partner.google.com> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
2021-05-11mb/google/dedede/var/metaknight: Update LTE USB port configurationKarthikeyan Ramasubramanian
Update LTE USB port configuration at run-time after probing the firmware config. By default the concerned USB port takes the Type-A port configuration. BUG=b:186380807 BRANCH=dedede TEST=Build and boot to OS in metaknight Change-Id: I5ad5a1670adef54075923cf912fb41a1ce776155 Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/52960 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: David Wu <david_wu@quanta.corp-partner.google.com> Reviewed-by: Evan Green <evgreen@chromium.org> Reviewed-by: Raymond Wong <wongraymond@google.com>
2021-05-11mb/google/dedede: Add a variant callback to update devicetree configDavid Wu
This callback is required to update the devicetree config at run-time after probing the firmware config. BUG=b:186380807 BRANCH=dedede TEST=Build and boot to OS in metaknight. Change-Id: I857211bfc4beb36ab225f3786c1707336a34aae9 Signed-off-by: David Wu <david_wu@quanta.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/52887 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Evan Green <evgreen@chromium.org> Reviewed-by: Raymond Wong <wongraymond@google.com>
2021-05-05mb/google/dedede: Create pirika variantkirk_wang
Create the pirika variant of the waddledee reference board by copying the template files to a new directory named for the variant. (Auto-Generated by create_coreboot_variant.sh version 4.5.0). BUG=b:184157747 BRANCH=None TEST=util/abuild/abuild -p none -t google/dedede -x -a make sure the build includes GOOGLE_PIRIKA Signed-off-by: kirk_wang <kirk_wang@pegatron.corp-partner.google.com> Change-Id: I57bf33deeadacc88800f9ce1d3d54385ba56c798 Reviewed-on: https://review.coreboot.org/c/coreboot/+/52626 Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-05-04mb/google/dedede/var/cret: Modify reset setting for touchscreenDtrain Hsu
Modify reset pin setting to ACPI_GPIO_OUTPUT_ACTIVE_LOW for ELAN and Weida touchscreen. BUG=b:180547621 BRANCH=dedede TEST=Build the cret board and touchscreen is workable. Signed-off-by: Dtrain Hsu <dtrain_hsu@compal.corp-partner.google.com> Change-Id: I912fe8a0e18a4c3527fb8587592b855c93b12406 Reviewed-on: https://review.coreboot.org/c/coreboot/+/52727 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
2021-05-02mb/google/dedede/var/magolor: Support VBT for MagisterDavid Wu
Default VBT supports only integrated Display port. Magister supports a HDMI port and hence support a separate VBT for Magister. BUG=b:180666608 BRANCH=dedede TEST=Build and boot to OS. Cq-Depend: chrome-internal:3661227 Signed-off-by: David Wu <david_wu@quanta.corp-partner.google.com> Change-Id: I52c10452887312959f68cfc4e25d5897dae388f8 Reviewed-on: https://review.coreboot.org/c/coreboot/+/51279 Reviewed-by: Karthik Ramasubramanian <kramasub@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-04-30mb/google/dedede/var/galith: Support Wifi SAR for DVT phaseFrankChu
Because galith/gallop both non-suport tablet mode, remove un-use fw_config conditional. BUG=b:176206495 TEST=enable CHROMEOS_WIFI_SAR in config of coreboot, emerge-dedede coreboot-private-files-baseboard-dedede coreboot chromeos-bootimage. Signed-off-by: FrankChu <frank_chu@pegatron.corp-partner.google.com> Change-Id: Ic9bb76c207ef033f81ecdd57849535b8ac8d13ae Reviewed-on: https://review.coreboot.org/c/coreboot/+/52565 Reviewed-by: Karthik Ramasubramanian <kramasub@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-04-28mb/google/dedede/var/metaknight: Define stop_gpio for goodix touch screenDavid Wu
Define TOUCH_RPT_EN pin(GPP_A11) as the stop_gpio for the touch screen and control TOUCH_RPT_EN pin to keep low. BUG=b:176253069 TEST=Build and boot metaknight to OS, confirm GPP_A11 pin keep low. Signed-off-by: David Wu <david_wu@quanta.corp-partner.google.com> Change-Id: I816e29eccac0f1935aeaa3b94c907870e2451e3a Reviewed-on: https://review.coreboot.org/c/coreboot/+/52653 Reviewed-by: Karthik Ramasubramanian <kramasub@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-04-23mb/google/dedede/var/storo: Modify eeprom setting for MIPI cameraTao Xia
Currently, it fails to dump the nvme data by test command. It reports the following error: cat: '/sys/bus/i2c/devices/i2c-PRP0001:01/eeprom': Connection timed out So increase the value from 0x0400 to 0x2000 and double the address width from 0x08 to 0x10 to solve this problem. BUG=b:177393430 TEST=1. cat /sys/bus/i2c/devices/i2c-PRP0001:01/eeprom > /tmp/ov8856_eeprom.bin 2. hexdump -C /tmp/ov8856_eeprom.bin > ov8856_eeprom_dump.log 3. cat ov8856_eeprom_dump.log Signed-off-by: Tao Xia <xiatao5@huaqin.corp-partner.google.com> Change-Id: Ia933927981f07e0f7954a4bc6d82f0bdd70181f5 Reviewed-on: https://review.coreboot.org/c/coreboot/+/52048 Reviewed-by: Karthik Ramasubramanian <kramasub@google.com> Reviewed-by: ShawnX Tu <shawnx.tu@intel.com> Reviewed-by: Wentao Qin <qinwentao@huaqin.corp-partner.google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-04-22mb/google/dedede/var/magolor: Select camera module based on SSFC valueSugnan Prabhu S
This patch has changes to support multiple cameras modules, based on the value set in the SSFC_CONFIG. BUG=b:176065425 TEST=Tested the changes with magolor 5MP and 8MP camera. Change-Id: I764abf70bacbe61452e7b0fd59c1b375227b5748 Signed-off-by: Shawn Tu <shawnx.tu@intel.com> Signed-off-by: Sugnan Prabhu S <sugnan.prabhu.s@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/50261 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
2021-04-21mb/google/dedede/var/sasuke: Update DPTF parametersSeunghwan Kim
Add control charging current from TSR0 and correct charger_perf table value. BUG=b:179067801 BRANCH=dedede TEST=emerge-dedede coreboot Change-Id: Ie0d969898defe76952e5c136fa93b7edffe51de3 Signed-off-by: Seunghwan Kim <sh_.kim@samsung.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/52408 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com> Reviewed-by: Edward Doan <edoan@google.com>
2021-04-21mb/google/dedede/metaknight: Add device list and probe daughter-boardDavid Wu
Metaknight has two daughter-board (DB_PORTS_1A_HDMI and DB_PORTS_LTE_HDMI), LTE and USB Type A use the same usb port,so needs to probe daughter-board to avoid USB device cannot recognize correctly. BUG=b:184809456 TEST=build and verify USB device can recognize correctly Signed-off-by: David Wu <david_wu@quanta.corp-partner.google.com> Change-Id: Ie42d12c7ce5c7341751c3cf92b5f37b6cd4d479f Reviewed-on: https://review.coreboot.org/c/coreboot/+/52369 Reviewed-by: Karthik Ramasubramanian <kramasub@google.com> Reviewed-by: Raymond Wong <wongraymond@google.com> Reviewed-by: Kaiyen Chang <kaiyen.chang@intel.corp-partner.google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-04-16mb/google/dedede/var/galith: support Audio AMP I2C/Auto modeFrankChu
support audio AMP selection with fw_config. BUG=b:185082705 BRANCH=dedede TEST=build pass Signed-off-by: FrankChu <frank_chu@pegatron.corp-partner.google.com> Change-Id: Ieb169c69a6716082dd218d05479bca46bbc09a3e Reviewed-on: https://review.coreboot.org/c/coreboot/+/52286 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
2021-04-16mb/google/dedede: Add AUDIO_AMP FW_CONFIG in devicetreeFrankChu
Add AUDIO_AMP ports bit field in devicetree. UNPROVISIONED 0 MAX98360 1 RT1015_I2C 2 RT1015P_AUTO 3 BUG=b:185082705 BRANCH=dedede TEST=build pass Signed-off-by: FrankChu <frank_chu@pegatron.corp-partner.google.com> Change-Id: I54f1e44036857dc00df074c38fde0fa82e589320 Reviewed-on: https://review.coreboot.org/c/coreboot/+/52317 Reviewed-by: Karthik Ramasubramanian <kramasub@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-04-16mb/google/dedede/var/storo:Add P-sensor for storoZanxi Chen
Modify GPIO_D22/D23/E11 configuration for P-sensor BUG=b:185214363 BRANCH=dedede TEST=built storo firmware and verified P-sensor function Change-Id: Ia2df1a227b04688a6b98384cd3a4e63023c0c1d9 Signed-off-by: Zanxi Chen <chenzanxi@huaqin.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/52315 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
2021-04-15mb/google/dedede/var/kracko: Add LTE modem supportTony Huang
Add LTE modem to devicetree Configure GPIO control for LTE modem BUG=b:178092096 TEST=Built image and verified with command modem status Change-Id: Id8f483e1132a08500fbe950711cc84197ce40b12 Signed-off-by: Tony Huang <tony-huang@quanta.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/52204 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
2021-04-15mb/google/dedede/var/sasukette: Enable Wifi SAR for sasuketteTao Xia
BUG=b:185084331 BRANCH=dedede TEST=enable CHROMEOS_WIFI_SAR in config of coreboot, emerge-dedede coreboot-private-files-baseboard-dedede coreboot chromeos-bootimage. Signed-off-by: Tao Xia <xiatao5@huaqin.corp-partner.google.com> Change-Id: Ie982741cb7b328623cf27f41c31f819e8cdb7bc9 Reviewed-on: https://review.coreboot.org/c/coreboot/+/52289 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
2021-04-14mb/google/dedede/var/boten: Add custom Wifi SAR for botenflexStanley Wu
Add wifi sar for botenflex. Due to fw-config cannot distinguish between boten and botenflex. Using sku_id to decide to load botenflex custom wifi sar. Detail reason for using sku_id in b:182433707. BUG=b:182433707 TEST=build and test on boten/botenflex Cq-Depend: chrome-internal:3686313 Change-Id: Id3f2529a7ad56ff306df98f77cda556656da52a5 Signed-off-by: Stanley Wu <stanley1.wu@lcfc.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/51501 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
2021-04-13dptf: Move platform-specific information to `struct dptf_platform_info`Tim Wawrzynczak
DPTF HIDs are different per-platform going forward, so refactor these into SoC-specific structures which the DPTF driver can query at runtime for platform-specific information. Change-Id: I6307f9d28f4274b851323ad69180ff4ae35053da Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/52220 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com>
2021-04-11mb/google/dedede: Enable HECIAseda Aboagye
This commit enables HECI such that interface can be used from userspace on the dedede mainboards. BUG=b:184219504 TEST=Build and flash drawcia, verify that Intel Flash Programming Tool can communicate with the Converged Security Engine. Signed-off-by: Aseda Aboagye <aaboagye@google.com> Change-Id: I5b28c471d6554a5e14538073d48ef47da05936fc Reviewed-on: https://review.coreboot.org/c/coreboot/+/52196 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
2021-04-09mb/google/dedede/var/boten: Configure Acoustic noise mitigation UPDsStanley Wu
Enable Acoustic noise mitigation for boten and set slew rate to 1/8 which is calibrated value for the board. BUG=b:180668001 BRANCH=dedede TEST=build firmware to UPD and Acoustic noise test Change-Id: I75851bd7c279feeab4ab94f4c82d55bf0e5ce316 Signed-off-by: Stanley Wu <stanley1.wu@lcfc.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/52135 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
2021-04-08mb/google/dedede/var/metaknight: Add support to handle pen detectionDavid Wu
Update devicetree and gpio setting of metaknight to handle pen detection. BUG=b:180426949 TEST=Build and check behavior is expected. Signed-off-by: David Wu <david_wu@quanta.corp-partner.google.com> Change-Id: Ieeca20eff57b16217a13d996dca3f662911f3e5a Reviewed-on: https://review.coreboot.org/c/coreboot/+/51709 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
2021-04-06mb/google/dedede/var/cret: Support LTE moduleDtrain Hsu
Add LTE module support into devicetree and associated GPIO configuration. BUG=b:183774169 BRANCH=dedede TEST=Build the cret board. Signed-off-by: Dtrain Hsu <dtrain_hsu@compal.corp-partner.google.com> Change-Id: I14684bb30e46bf845a401649f56b16b60db379e8 Reviewed-on: https://review.coreboot.org/c/coreboot/+/51844 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
2021-04-06mb/google/dedede/var/cret: Add audio supportDtrain Hsu
Select the drivers for DA7219 codec and MAX98360A spk amp BUG=b:183771323 BRANCH=dedede TEST=emerge-dedede coreboot chromeos-bootimage Signed-off-by: Dtrain Hsu <dtrain_hsu@compal.corp-partner.google.com> Change-Id: I3fd7c374fc8214e25a28fb9ba62a9c8473d3f755 Reviewed-on: https://review.coreboot.org/c/coreboot/+/51841 Reviewed-by: Henry Sun <henrysun@google.com> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-04-05mb/google/dedede/var/sasuke: Update DPTF parametersSeunghwan Kim
Remove TSR2, use DPTF parameters from internal thermal team. BUG=b:183749595 BRANCH=dedede TEST=emerge-dedede coreboot Change-Id: I3182b96bf36c8d07299fe435a29e6b8c0b8a6927 Signed-off-by: Seunghwan Kim <sh_.kim@samsung.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/51970 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com> Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com>
2021-04-05mb/google/dedede/var/sasuke: Configure I2C times for touchpad/audioSeunghwan Kim
Configure I2C rise/fall time in device tree to ensure I2C CLK runs accurately at I2C_SPEED_FAST (< 400 kHz). Measured I2C frequency just as below after tuning: I2C0(touchpad): 385 kHz I2C4(audio): 380 kHz BUG=b:180335053 BRANCH=dedede TEST=Build and check after tuning I2C clock is under 400kHz Change-Id: Ic92ee0379456e80260a8026bc38ee41325dad6d2 Signed-off-by: Seunghwan Kim <sh_.kim@samsung.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/51335 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
2021-04-05mb/google/dedede: add lalala variantAaron Durbin
The Lalala variant is a design that differs only in replacing Cr50 with a discrete TPM part. BUG=b:184151664 Change-Id: I2f7abb9637cd5a13ac896396781b19feb156c948 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/52031 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com> Reviewed-by: Aseda Aboagye <aaboagye@google.com>
2021-04-05mb/google/dedede: add discrete TPM 2.0 configurationAaron Durbin
There are forthcoming designs that will be utilizing a discrete TPM 2.0 solution. Split the existing dedede configuration options so future mainboard variants can easily select the appropriate Kconfig option using the newly introduced options: - BOARD_GOOGLE_BASEBOARD_DEDEDE_CR50 - BOARD_GOOGLE_BASEBOARD_DEDEDE_TPM2 The existing variants all select the former option, BOARD_GOOGLE_BASEBOARD_DEDEDE_CR50 since all those designs currently utilize Cr50. BUG=b:184151664 Change-Id: I2bdb1ca4fd78cc0628256d49678ea042c55f6fba Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/52030 Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Aseda Aboagye <aaboagye@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-04-01mb/google/dedede/var/lantis: Configure Acoustic noise mitigation UPDsTony Huang
Enable Acoustic noise mitigation for lantis and set slew rate to 1/4 which is calibrated value for the board. Other values like PreWake, Rampup and RampDown are 0 by default. BUG=b:183561593 BRANCH=dedede TEST=EE verify acoustic noise test passes. Change-Id: I5e5f24ed934910726c220678068d085b6ee2bcf6 Signed-off-by: Tony Huang <tony-huang@quanta.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/51762 Reviewed-by: Karthik Ramasubramanian <kramasub@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-03-28mb/google/dedede/var/boten: Fix DPTF passive and critical policiesStanley Wu
Thermal sensor2 defined in baseboard do not exist in boten. With the format the DPTF policies are defined in boten, all the entries from the baseboard are included and then the overrides applied. This causes the non-existent DPTF devices to be exported in the ACPI table and in turn OS reading invalid temperatures. Fix the format for DPTF passive and critical policies. BUG=None BRANCH=dedede TEST=Build and boot to OS in boten. Ensure that the DPTF entries look correct in both static.c and SSDT tables i.e. passive and critical policies for applicable devices only are present. Change-Id: I63c781e0a439f1e7a3525fa7cf290fa9300cb066 Signed-off-by: Stanley Wu <stanley1.wu@lcfc.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/51722 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com> Reviewed-by: Ben Kao <ben.kao@intel.com> Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com>
2021-03-28mb/google/dedede/var/blipper: Enable ALC1015 AMP (Auto Mode) driverlizhi7
Enable gpio mode driver for ALC1015 AMP Auto Mode. BUG=b:181732574 BRANCH=dedede TEST=ALC1015Q-VB drive speaker OK Signed-off-by: lizhi7 <lizhi7@huaqin.corp-partner.google.com> Change-Id: Idc5b190fc2c30689feaf08229b2a75c69894ac5e Reviewed-on: https://review.coreboot.org/c/coreboot/+/51763 Reviewed-by: Weimin Wu <wuweimin@huaqin.corp-partner.google.com> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-03-28mb/google/dedede/var/storo: Enable ALC1015 AMP (Auto Mode) driverlizhi7
Enable gpio mode driver for ALC1015 AMP Auto Mode. BUG=b:177868812 BRANCH=dedede TEST=ALC1015Q-VB drive speaker OK Signed-off-by: lizhi7 <lizhi7@huaqin.corp-partner.google.com> Change-Id: Ic7deb9be6444d85d32ff94ce8e4a140dbdea349e Reviewed-on: https://review.coreboot.org/c/coreboot/+/51732 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Weimin Wu <wuweimin@huaqin.corp-partner.google.com> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
2021-03-28mb/google/dedede/var/storo: Configure I2C times for I2C devicesTao Xia
Configure I2C high / low time in device tree to ensure I2C CLK runs accurately at I2C_SPEED_FAST (400 kHz). Measured I2C frequency just as below after tuning: touchpad:371.63 kHz touchpanel:368.24 kHz audio codec RT5682:369.13 kHz speaker AMP L:366.21 kHz speaker AMP R:365.8 kHz P-sensor:368.34 kHz MIPI Camera:363.35 kHz BUG=b:181589325 BRANCH=dedede TEST=Build and check after tuning I2C clock is under 400kHz Signed-off-by: Tao Xia <xiatao5@huaqin.corp-partner.google.com> Change-Id: I1a755a54540e106b41ac427f84989ed7e8037558 Reviewed-on: https://review.coreboot.org/c/coreboot/+/51624 Reviewed-by: Karthik Ramasubramanian <kramasub@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-03-28mb/google/dedede/var/sasuke: Add support zinitix touchpadSeunghwan Kim
This change adds support zinitix touchpad for sasuke. BRANCH=dedede BUG=None TEST=built and checked touchpad worked on sasuke Change-Id: I85794311c49e33c4683482e125bea5ca2dbacfa8 Signed-off-by: Seunghwan Kim <sh_.kim@samsung.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/51840 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
2021-03-25mb/google/dedede/var/cret: Enable touchscreenDtrain Hsu
Add ELAN and Weida touchscreen into devicetree for cret. BUG=b:180547621 BRANCH=dedede TEST=Build the cret board. Signed-off-by: Dtrain Hsu <dtrain_hsu@compal.corp-partner.google.com> Change-Id: Icdb7aabe4a9ecd7b5a057c4644799aa537adb6ba Reviewed-on: https://review.coreboot.org/c/coreboot/+/51737 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
2021-03-25mb/google/dedede/var/cret: Configure I2C ports and touchpadDtrain Hsu
1. Support Elan touchpad. 2. Support JYT touchpad. 3. Follow schematic to disable I2C1 and I2C3. BUG=b:183454249, b:180547781 BRANCH=dedede TEST=Build the cret board. Signed-off-by: Dtrain Hsu <dtrain_hsu@compal.corp-partner.google.com> Change-Id: I8c150c3f65d0e057d5ba1b07ec1c20886f02ef6e Reviewed-on: https://review.coreboot.org/c/coreboot/+/51726 Reviewed-by: Karthik Ramasubramanian <kramasub@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-03-25mb/google/dedede/var/cret: Generate SPD ID for supported partsDtrain Hsu
Add supported memory parts in the mem_parts_used.txt and generate the SPD ID for the parts. The memory parts being added are: 1. H9HCNNNBKMMLXR-NEE 2. MT53E512M32D2NP-046 WT:F 3. K4U6E3S4AA-MGCR BUG=b:183057749 BRANCH=dedede TEST=Build the cret board. Signed-off-by: Dtrain Hsu <dtrain_hsu@compal.corp-partner.google.com> Change-Id: Iacfdd9a27f126ba4b97d1a6493bcc09bb31454a5 Reviewed-on: https://review.coreboot.org/c/coreboot/+/51619 Reviewed-by: EricR Lai <ericr_lai@compal.corp-partner.google.com> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-03-25mb/google/dedede/var/cret: Configure USB port settingsDtrain Hsu
Follow schematic to modify USB port settings. USB2 [0]: USB Type C Port 0 USB2 [1]: None USB2 [2]: USB Type A Port 0 USB2 [3]: LTE USB2 [4]: None USB2 [5]: Camera UFC USB2 [6]: Camera WFC USB2 [7]: Integrated Bluetooth USB3 [0]: USB Type C Port 0 (M/B side) USB3 [1]: None USB3 [2]: USB Type A Port 0 (M/B side) USB3 [3]: LTE BUG=b:182973703 BRANCH=dedede TEST=Build the coreboot image. Signed-off-by: Dtrain Hsu <dtrain_hsu@compal.corp-partner.google.com> Change-Id: I80447d6ac3422f858a9022f550b4f42353819405 Reviewed-on: https://review.coreboot.org/c/coreboot/+/51568 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
2021-03-25mb/google/dedede/var/cret: Configure GPIODtrain Hsu
Follow schematic to modify some GPIO pins. GPP_C12 - NC Pin, UP_20K GPP_C18 - NC Pin GPP_C19 - NC Pin GPP_C22 - NC Pin, UP_20K GPP_D12 - NC Pin GPP_D14 - NC Pin GPP_D15 - NC Pin GPP_D19 - NC Pin GPP_D20 - NC Pin GPP_E0 - NC Pin GPP_E2 - NC Pin GPP_H1 - NC Pin GPP_H6 - NC Pin GPP_H7 - NC Pin GPP_G0 - NC Pin GPP_G1 - NC Pin GPP_G2 - NC Pin GPP_G3 - NC Pin GPP_G4 - NC Pin GPP_G5 - NC Pin, UP_20K GPP_G6 - NC Pin GPP_G7 - NC Pin BUG=b:183078393 BRANCH=dedede TEST=Build the cret board. Signed-off-by: Dtrain Hsu <dtrain_hsu@compal.corp-partner.google.com> Change-Id: Id966884f3e36303b636fa13ef9baecccae87604a Reviewed-on: https://review.coreboot.org/c/coreboot/+/51629 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
2021-03-22mb/google/dedede: Create cret variantIan Feng
Create the cret variant of the waddledoo reference board by copying the template files to a new directory named for the variant. (Auto-Generated by create_coreboot_variant.sh version 4.5.0). BUG=b:181325655 BRANCH=None TEST=util/abuild/abuild -p none -t google/dedede -x -a make sure the build includes GOOGLE_CRET Signed-off-by: Ian Feng <ian_feng@compal.corp-partner.google.com> Change-Id: I700201cf81b25c6776df3ec9fc843cd9bd8c88c0 Reviewed-on: https://review.coreboot.org/c/coreboot/+/51557 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com> Reviewed-by: EricR Lai <ericr_lai@compal.corp-partner.google.com>
2021-03-22mb/google/dedede/var/storo: Add USB Port ConfigurationZanxi Chen
Add USB Port configuration into devicetree for storo BUG=b:177389444 BRANCH=dedede TEST=built firmware and verified USB3.0 function is OK Change-Id: I1527c7178ffac9b2322eb65aab6e2086d949e47c Signed-off-by: Zanxi Chen <chenzanxi@huaqin.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/51635 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
generated by cgit v1.2.3 (git 2.25.1) at 2024-08-15 02:17:52 +0000