coreboot - Some coreboot project code with my work

Age	Commit message (Expand)	Author
2020-05-18	src: Remove leading blank lines from SPDX header	Elyes HAOUAS
2020-05-11	treewide: Remove "this file is part of" lines	Patrick Georgi
2020-05-09	src/: Replace GPL boilerplate with SPDX headers	Patrick Georgi
2020-03-18	mainboard/google: Remove copyright notices	Patrick Georgi
2018-05-22	rk3399: Enable bootblock compression	Julius Werner
2017-05-11	google/gru: support 800M/928M frequency for bob	Caesar Wang
2017-03-07	google/gru: add MAX_SDRAM_FREQ config to choose max ddr freq	Shunqian Zheng
2016-10-25	rockchip/rk3399: reset system if DDR init fails	Lin Huang
2016-09-20	gru: Add watchdog reset support	Julius Werner
2016-08-31	rockchip/rk3399: Add pwm_regulator.c for pwm then ramp boot up cpu	Eric Gao
2016-08-31	rockchip/rk3399: Move romstage.c to mainboard/gru	Shunqian Zheng
2016-08-27	gru: Make SDRAM parameters individual struct files in CBFS	Julius Werner
2016-07-18	gru: implement hw reset function	Vadim Bendebury
2016-07-10	gru: include ram_code in coreboot table	Vadim Bendebury
2016-05-09	google/gru: Determine Board ID based on the input voltage of ADC1	Vadim Bendebury
2016-05-09	rockchip: rk3399: add sdram driver	Lin Huang
2016-04-16	google/gru: Incorporate feedback to #14279	Patrick Georgi
2016-04-16	google/gru: Add a stub rk3399 mainboard	huang lin