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coreboot
2560p
820g2
autoport-hsw
broadwell_refcode
e6230
e7240_bdw
haswell-mrc
hp820g1
hp9480m
mec1322
Some coreboot project code with my work
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google
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gru
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sdram_params
Age
Commit message (
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Author
2020-03-18
mainboard/google: Remove copyright notices
Patrick Georgi
2017-12-05
google/gru: update RAMID table
Lin Huang
2017-06-19
rockchip/rk3399: fix DRAM gate training issue
Lin Huang
2017-05-11
google/gru: support 800M/928M frequency for bob
Caesar Wang
2017-03-07
google/gru: add MAX_SDRAM_FREQ config to choose max ddr freq
Shunqian Zheng
2016-12-06
Bob: Update the memory ramid of bob
Shasha Zhao
2016-12-06
Bob: add bob in coreboot
Shasha Zhao
2016-11-17
google/gru: Move to one CA training pattern
Derek Basehore
2016-11-17
google/gru: Add new CA training pattern
Derek Basehore
2016-11-02
rockchip/rk3399: sdram: also prepare the index1 configuration
Lin Huang
2016-10-25
rockchip/rk3399: gru/kevin: drop unused sdram configs
Lin Huang
2016-10-07
google/gru: set W2W_DIFFCS_DLY to 5
Lin Huang
2016-10-06
rockchip: rk3399: improve write leveling flow
Jianqun Xu
2016-10-06
rockchip: rk3399: improve sdram noc timing
Lin Huang
2016-10-06
rockchip/rk3399: lower kevin board sdram frequency to 800MHz
Lin Huang
2016-08-27
gru: Make SDRAM parameters individual struct files in CBFS
Julius Werner