coreboot - Some coreboot project code with my work

Age	Commit message (Expand)	Author
2014-11-13	nyan: Select the CD570M Tegra124 model.	Gabe Black
2014-11-13	nyan: Update 924MHz BCT w/latest qual'd cfg, use 924 as default speed for 2GB	Tom Warren
2014-11-13	nyan: nyan_big: Mark the address range covering the SRAM as cachable.	Gabe Black
2014-11-13	nyan: Add 4GB bct support	Jimmy Zhang
2014-11-13	nyan: big: Check dram_end when setting up caching in ROM stage.	Gabe Black
2014-11-12	tegra124: Program PWM1 to drive panel backlight	Andrew Chew
2014-11-12	tegra124: Enable PWM clock, and set up PWM1 pin	Andrew Chew
2014-11-12	tegra124: nyan: Keep in memory structures below 4GB.	Gabe Black
2014-11-12	nyan: Use asm volatile instead of plain asm so it doesn't get optimized out.	Gabe Black
2014-11-10	arm: Redesign, clarify and clean up cache related code	Julius Werner
2014-10-22	tegra/nyan*: sdram updates	Tom Warren
2014-10-17	Add board_info for all Google/Intel boards mitting the file	Stefan Reinauer
2014-09-24	big: Create a nyan_big mainboard which is a copy of nyan.	Gabe Black
2014-09-22	tegra124/nyan: memory and display updates	Andrew Bresticker
2014-09-17	spi: add Kconfig variable for dual-output read enable	David Hendricks
2014-09-13	arm: Move exception_init() close to console_init()	Julius Werner
2014-09-13	tegra124/nyan: display, clock, and other updates	Julius Werner
2014-09-12	tegra124/nyan: various fixes and additions	Hung-Te Lin
2014-09-11	tegra124/nyan: rougly stable code base	Gabe Black
2014-09-10	nyan: Add a stub mainboard.	Gabe Black