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path: root/src/mainboard/google/poppy/Kconfig
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2019-10-21google/poppy: add VBT for nautilus variantMatt DeVillier
Add data.vbt and modify Kconfig appropriately; allows use of FSP/GOP display init. VBT extracted from stock ChromeOS firmware. Change-Id: I8a2d093ad96f72fb420b94aafa790e3ba900d905 Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/36106 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
2019-10-03mb/[google/intel]/*: Specify Chrome EC bus - LPC or ESPIMartin Roth
Previously all boards using eSPI for the Chrome EC just called it LPC as the code for the chrome EC is the same between the two busses. I'm adding a new Kconfig symbol to specify eSPI, so switch the boards that actually use eSPI to that symbol and add the LPC symbol to all the others. The EC_GOOGLE_CHROMEEC_LPC symbol will no longer default to enabled for x86 platforms, so one symbol or the other needs to be specified for each platform. BUG=b:140055300 TEST=Build tested only. Change-Id: Icf242ca2b7d8b1470feda4e44b47a2cdc20680f2 Signed-off-by: Martin Roth <martinroth@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/35153 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2019-09-30mb: remove test-only HWIDsHung-Te Lin
The CONFIG_GBB_HWID can be generated automatically now so we can remove the test-only HWIDs set in board config files. BUG=b:140067412 TEST=Built few boards (kukui, cheza, octopus) and checked HWID: futility gbb -g coreboot.rom Change-Id: I4070f09d29c5601dff1587fed8c60714eb2558b7 Signed-off-by: Hung-Te Lin <hungte@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/35635 Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-06-25atlas: enable GEO_SARCaveh Jalali
BUG=b:131634035 BRANCH=none TEST=verified SAR data shows up in ACPI SSDT table. Change-Id: I65ef59c9616b1cae3fa4c4b18bbfe4ed098d2891 Signed-off-by: Caveh Jalali <caveh@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/33791 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
2019-06-21soc/intel/skylake: Clean up KconfigArthur Heymans
This does the following: - select MAINBOARD_USES_FSP2_0 on Kabylake (does not support FSP1.1) - Remove stale Kconfig option on intel/saddlebrook - select SOC_INTEL_KABYLAKE on intel/kblrvp Change-Id: I64f48eeb00150aea039d533b0ac471fdd8483b90 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/33561 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
2019-05-10mb/google/nami: Add VBT blobs and include them in cbfsArthur Heymans
Add vbt files for nami variants and select Kconfig option to utilize them. The default vbt is automatically added by the Kconfig selection and so does not need to be specified in the makefile with the others. Test: boot vayne and akali nami variants, verify display functional and correct vbt loaded. Change-Id: Iaf49bdee7ae82a0a61192327351267f098eb5ab1 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/30427 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
2019-05-03mb/google/poppy/variant/atlas: enable USB acpiGaggery Tsai
Main objective for this change is to export the bluetooth reset gpio to the kernel for use in an rf-kill operation. To do so, we enable USB acpi and define all of the USB2 devices, which includes bluetooth's reset gpio information. BUG=b:122540489 BRANCH=None TEST=emerge-atlas coreboot chromeos-bootimage $cat sys/firmware/acpi/tables/SSDT > /tmp/ssdt.dat & retrieve ssdt.dat from DUT & $iasl -d ./ssdt.dat & check the HS03 node is with "reset-gpio" under _DSD object Change-Id: I411ef707782655361bd1b8ac2b914b8ae64defeb Signed-off-by: Gaggery Tsai <gaggery.tsai@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/30754 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nick Vaccaro <nvaccaro@google.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Caveh Jalali <caveh@google.com>
2019-01-11soc/mainboard: Update mainboard UART KconfigLijian Zhao
After f5ca922 (Untangle CBFS microcode updates) got merged, all mainboard using intel apollolake, cannonlake, coffeelake, glk, kabylake, skylake, icelake and whiskeylake get affected. Using INTEL_LPSS_UART_FOR_CONSOLE instead of UART_DEBUG and set default console for each platform. BUG=N/A TEST=Build and test on Sarien platform, by default we can still get console from cbmem, and enable CONSOLE_SERIAL can get logs from UART port 2. Signed-off-by: Lijian Zhao <lijian.zhao@intel.com> Change-Id: I550a00144cff21420537bb161c64e7a132c5d2de Reviewed-on: https://review.coreboot.org/c/30853 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Bora Guvendik <bora.guvendik@intel.com> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2019-01-07mb/google/poppy/variant/rammus: enable USB acpimarxwang
Main objective for this change is to export the bluetooth reset gpio to the kernel for use in an rf-kill operation. To do so, we enable USB acpi and define all of the USB2 devices, which includes bluetooth's reset gpio information. BUG=b:119899987 TEST=build and flash to rammus, log into rammus and 'cat /sys/firmware/acpi/tables/SSDT > /tmp/ssdt.dml', copy that ssdt.dsml to /tmp/ssdt.dml on host machine, 'iasl -d /tmp/ssdt.dml', then verify that "reset gpio" shows up in the HS03 node's _DSD package in the table. Signed-off-by: marxwang <marx.wang@intel.com> Change-Id: Ieadb3609c7634a20e96c7c4dfb96f5e3f23e468b Reviewed-on: https://review.coreboot.org/c/30607 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Zhuohao Lee <zhuohao@google.com> Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
2018-12-20Revert "mb/google/poppy/variants/nocturne: Add DMIC properties to ACPI DSD"Jenny TC
This reverts commit 999b916015ea0558e3821bdb51501b43a60b5ed6. The DMIC doesn't have an ACPI id. The patch which enables ACPI device with id DMIC may create conflict in the feature. Also the ACPI id "DMIC" doesn't comply with ACPI naming conventions. The issue for which the patch was introduced, is already addressed in kernel DMIC driver and the patches are upstreamed in to the Linux kernel. Change-Id: I42cb076700dcb5906599471bebfcd5b265b17644 Signed-off-by: Jenny TC <jenny.tc@intel.com> Reviewed-on: https://review.coreboot.org/c/30151 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Nick Vaccaro <nvaccaro@google.com>
2018-12-19mb/google/variant/nocturne: set CONFIG_NO_FADT_8042Nick Vaccaro
Set CONFIG_NO_FADT_8042 to avoid probing for the 8042 controller. This speeds up boot on nocturne by 1.3 seconds: Before change: [2.162266] EXT4-fs (mmcblk0p3): mounting ext2 file system using the ext4 subsystem After change: [0.867735] EXT4-fs (mmcblk0p3): mounting ext2 file system using the ext4 subsystem BUG=b:120960844 BRANCH=none TEST=build, flash, and boot nocturne; check dmesg to verify that boot is faster and that you don't see the following log in dmesg: [0.671501] i8042: Probing ports directly. Change-Id: I62a16e6de5e74fa17970d9967f6d1628497ec1d3 Signed-off-by: Nick Vaccaro <nvaccaro@google.com> Reviewed-on: https://review.coreboot.org/c/30283 Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-11-22mb/google/poppy/variant/nocturne: enable USB acpiNick Vaccaro
Main objective for this change is to export the bluetooth reset gpio to the kernel for use in an rf-kill operation. To do so, we enable USB acpi and define all of the USB2 devices, which includes bluetooth's reset gpio information. This change produces the following nodes in the SSDT : Scope (\_SB.PCI0.XHCI.RHUB.HS01) { Name (_DDN, "USB Type C Port 1") // _DDN: DOS Device Name Name (_UPC, Package (0x04) // _UPC: USB Port Capabilities { 0xFF, 0x09, Zero, Zero }) Name (_PLD, ToPLD ( PLD_Revision = 0x2, PLD_IgnoreColor = 0x1, PLD_Red = 0x0, PLD_Green = 0x0, PLD_Blue = 0x0, PLD_Width = 0x0, PLD_Height = 0x0, PLD_UserVisible = 0x1, PLD_Dock = 0x0, PLD_Lid = 0x0, PLD_Panel = "UNKNOWN", PLD_VerticalPosition = "CENTER", PLD_HorizontalPosition = "CENTER", PLD_Shape = "OVAL", PLD_GroupOrientation = 0x0, PLD_GroupToken = 0x0, PLD_GroupPosition = 0x0, PLD_Bay = 0x0, PLD_Ejectable = 0x0, PLD_EjectRequired = 0x0, PLD_CabinetNumber = 0x0, PLD_CardCageNumber = 0x0, PLD_Reference = 0x0, PLD_Rotation = 0x0, PLD_Order = 0x0, PLD_VerticalOffset = 0x0, PLD_HorizontalOffset = 0x0) ) // _PLD: Physical Location of Device } Scope (\_SB.PCI0.XHCI.RHUB.HS03) { Name (_DDN, "Bluetooth") // _DDN: DOS Device Name Name (_UPC, Package (0x04) // _UPC: USB Port Capabilities { 0xFF, 0xFF, Zero, Zero }) Name (_PLD, ToPLD ( PLD_Revision = 0x2, PLD_IgnoreColor = 0x1, PLD_Red = 0x0, PLD_Green = 0x0, PLD_Blue = 0x0, PLD_Width = 0x0, PLD_Height = 0x0, PLD_UserVisible = 0x0, PLD_Dock = 0x0, PLD_Lid = 0x0, PLD_Panel = "UNKNOWN", PLD_VerticalPosition = "CENTER", PLD_HorizontalPosition = "CENTER", PLD_Shape = "UNKNOWN", PLD_GroupOrientation = 0x0, PLD_GroupToken = 0x0, PLD_GroupPosition = 0x0, PLD_Bay = 0x0, PLD_Ejectable = 0x0, PLD_EjectRequired = 0x0, PLD_CabinetNumber = 0x0, PLD_CardCageNumber = 0x0, PLD_Reference = 0x0, PLD_Rotation = 0x0, PLD_Order = 0x0, PLD_VerticalOffset = 0x0, PLD_HorizontalOffset = 0x0) ) // _PLD: Physical Location of Device Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings { GpioIo (Exclusive, PullDefault, 0x0000, 0x0000, IoRestrictionOutputOnly, "\\_SB.PCI0.GPIO", 0x00, ResourceConsumer, , ) { // Pin list 0x0062 } }) Name (_DSD, Package (0x02) // _DSD: Device-Specific Data { ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301") /* Device Properties for _DSD */, Package (0x01) { Package (0x02) { "reset-gpio", Package (0x04) { \_SB.PCI0.XHCI.RHUB.HS03, Zero, Zero, One } } } }) } Scope (\_SB.PCI0.XHCI.RHUB.HS05) { Name (_DDN, "USB Type C Port 2") // _DDN: DOS Device Name Name (_UPC, Package (0x04) // _UPC: USB Port Capabilities { 0xFF, 0x09, Zero, Zero }) Name (_PLD, ToPLD ( PLD_Revision = 0x2, PLD_IgnoreColor = 0x1, PLD_Red = 0x0, PLD_Green = 0x0, PLD_Blue = 0x0, PLD_Width = 0x0, PLD_Height = 0x0, PLD_UserVisible = 0x1, PLD_Dock = 0x0, PLD_Lid = 0x0, PLD_Panel = "UNKNOWN", PLD_VerticalPosition = "CENTER", PLD_HorizontalPosition = "CENTER", PLD_Shape = "OVAL", PLD_GroupOrientation = 0x0, PLD_GroupToken = 0x0, PLD_GroupPosition = 0x0, PLD_Bay = 0x0, PLD_Ejectable = 0x0, PLD_EjectRequired = 0x0, PLD_CabinetNumber = 0x0, PLD_CardCageNumber = 0x0, PLD_Reference = 0x0, PLD_Rotation = 0x0, PLD_Order = 0x0, PLD_VerticalOffset = 0x0, PLD_HorizontalOffset = 0x0) ) // _PLD: Physical Location of Device } Scope (\_SB.PCI0.XHCI.RHUB.HS07) { Name (_DDN, "POGO") // _DDN: DOS Device Name Name (_UPC, Package (0x04) // _UPC: USB Port Capabilities { 0xFF, 0xFF, Zero, Zero }) Name (_PLD, ToPLD ( PLD_Revision = 0x2, PLD_IgnoreColor = 0x1, PLD_Red = 0x0, PLD_Green = 0x0, PLD_Blue = 0x0, PLD_Width = 0x0, PLD_Height = 0x0, PLD_UserVisible = 0x0, PLD_Dock = 0x0, PLD_Lid = 0x0, PLD_Panel = "UNKNOWN", PLD_VerticalPosition = "CENTER", PLD_HorizontalPosition = "CENTER", PLD_Shape = "UNKNOWN", PLD_GroupOrientation = 0x0, PLD_GroupToken = 0x0, PLD_GroupPosition = 0x0, PLD_Bay = 0x0, PLD_Ejectable = 0x0, PLD_EjectRequired = 0x0, PLD_CabinetNumber = 0x0, PLD_CardCageNumber = 0x0, PLD_Reference = 0x0, PLD_Rotation = 0x0, PLD_Order = 0x0, PLD_VerticalOffset = 0x0, PLD_HorizontalOffset = 0x0) ) // _PLD: Physical Location of Device } BUG=b:119275094 TEST=build and flash to nocturne, log into nocturne and 'cat /sys/firmware/acpi/tables/SSDT > /tmp/ssdt.dml', copy that ssdt.dsml to /tmp/ssdt.dml on host machine, 'iasl -d /tmp/ssdt.dml', then verify that "reset gpio" shows up in the HS03 node's _DSD package in the table. Change-Id: I65d9b580fd69fd0a2c84f14b78a8e8b5e9217b16 Signed-off-by: Nick Vaccaro <nvaccaro@google.com> Reviewed-on: https://review.coreboot.org/c/29622 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Rajat Jain <rajatja@google.com>
2018-10-15vc/google/chromeos/ec: remove EC hibernate in cr50 update pathAaron Durbin
More platforms are not able to hibernate under certain circumstances, such as when AC is plugged. This original path was conservatively put in to prevent potential damage when cr50-update-caused asynchronous resets occur. Julius' compelling argument that async resets from recovery mode requests should have enough coverage of the design over the course of project development. Remove the hibernate path and assume all is well going forward. Change-Id: I37121e75ff4e6abcb41d8534a1eccf0788ce2ea2 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/29076 Reviewed-by: Justin TerAvest <teravest@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Julius Werner <jwerner@chromium.org> Reviewed-by: Furquan Shaikh <furquan@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-10-06mb/google/poppy/variants/nocturne: Add DMIC properties to ACPI DSDFurquan Shaikh
This change uses the generic device driver to provide DMIC properties in ACPI table to the OS driver. BUG=b:112888584 Change-Id: I239f571bc29f02793f017a4713b5af03b23cfa3e Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/28797 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: HARSHAPRIYA N <harshapriya.n@intel.com> Reviewed-by: Nick Vaccaro <nvaccaro@google.com> Reviewed-by: Sathyanarayana Nujella <sathyanarayana.nujella@intel.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-09-02mb/google/poppy/Kconfig: Fix missing device node /dev/tpm0 for H1Zhuohao Lee
This patch adds the DRIVERS_SPI_ACPI to enable the tpm device node. Without DRIVERS_SPI_ACPI, the kernel will popped out the below error: cr50-update[592]: Starting cr50 update cr50_get_name[595]: updater is /usr/sbin/gsctool -s cr50-update[609]: exit status: 3 cr50-update[613]: output: Could not open TPM: No such file or directory cr50_get_name[615]: board_id: '' board_flags: '0x', extension: 'prod' cr50-update[617]: hashing /opt/google/cr50/firmware/cr50.bin.prod cr50-update[678]: current state 3 in /var/cache/cr50.a3055efbc9.state cr50-update[682]: not running cr50-result[782]: Not running normal image. Skip setting Board ID trunksd[795]: TPM: Error opening tpm0 file descriptor at /dev/tpm0: No such file or directory BUG=none BRANCH=master TEST=/dev/tpm0 is created Change-Id: I35287c6c54299c2677c41fc830675570b9d45a94 Signed-off-by: Zhuohao Lee <zhuohao@chromium.org> Reviewed-on: https://review.coreboot.org/28400 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
2018-08-17Nami: Disable powering off EC on cr50 updateDaisuke Nojiri
Nami doesn't support wakeup from hibernation by CR50. This causes the device to remain turned off after CR50 update. This patch disables turning off EC on cr50 update. CR50 resets the whole system. So, EC reset is not required. Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> BUG=b:112604277 BRANCH=none TEST=gsctool -a -u /media/removable/cr50.bin && reboot Verify EC reboots. AP prints 'Waiting for CR50 reset to pick up update' then reboots. Change-Id: I06f5eb6100e8af6ffec45d4de2b40eff44f89709 Reviewed-on: https://review.coreboot.org/28113 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-08-06mb/google/poppy/variants/rammus: add rammus devicetree.cbZhuohao Lee
Use the default value for Iccmax which is specified in vr_config.c. The AcLoadline and DcLoadline keep the poppy value. Besides, the USB 2.0 ports located on the mainboard are set to USB2_PORT_SHORT and the others on the daughterboard are set to USB2_PORT_LONG. Those setting need to be fine tuned later. BUG=b:111579386 BRANCH=Master TEST=Build pass Change-Id: Icabfac04c94b3d480872c243d811509e274ef122 Signed-off-by: Zhuohao Lee <zhuohao@chromium.org> Reviewed-on: https://review.coreboot.org/27808 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
2018-08-06mb/google/poppy/variants/rammus: add audio, mic and codec configurationZhuohao Lee
Rammus uses DA7219 Headset, Maxim MAX98927 Smart Amps and 4 channel dmic BUG=b:111579386 BRANCH=Master TEST=Build pass Change-Id: If21a3870ee4b000a776d2f3e025fb43ef2fe48c7 Signed-off-by: Zhuohao Lee <zhuohao@chromium.org> Reviewed-on: https://review.coreboot.org/27805 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
2018-08-06mb/google/poppy/variants/rammus: change build directory to rammusZhuohao Lee
Move the build board directory from poppy to rammus. BUG=b:111579386 BRANCH=Master TEST=Build pass Change-Id: I3a9fc2bbfe7261661f0c5c073baff0ff1434d09f Signed-off-by: Zhuohao Lee <zhuohao@chromium.org> Reviewed-on: https://review.coreboot.org/27804 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
2018-07-23mb/google/poppy/variants/rammus: Add support for rammus boardZhuohao Lee
This change adds variant rammus derived from baseboard poppy. The setting is copied from the poppy and will be modified later BUG=b:111579386 BRANCH=master TEST=emerge-rammus coreboot Change-Id: I169c225e28183a7a93f1142a3bf87a60b26ce9ca Signed-off-by: Zhuohao Lee <zhuohao@chromium.org> Reviewed-on: https://review.coreboot.org/27547 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
2018-07-21nocturne: enable GEO SARPratik Prajapati
Enable the GEO SAR feature for nocturne. OxM programs wifi_sar VPD key in factory. coreboot reads the VPD and creates the ACPI table as per the WGDS spec. BUG=b:65155728 BRANCH=none TEST= Set the wifi_sar VPD with below command (values are junk for test purpose only, actual values would be set be OxM) sudo vpd -f <coreboot.rom> -s wifi_sar=30313233343536373839303132333435363738393030313 24142433435364445463031324142433400364445463031323343444546303132333435 Flash the <coreboot.rom> and boot to kernel. Get ACPI table and WGDS would get created with VPD values passed in. Change-Id: I32ad591f15fdb34704c8d98d98646dfa2d8882ff Signed-off-by: Pratik Prajapati <pratikkumar.v.prajapati@intel.com> Reviewed-on: https://review.coreboot.org/27501 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nick Vaccaro <nvaccaro@google.com>
2018-07-17mb/google/atlas: Add MIPI camera ASL filesChen, Ping-chung
Atlas has one sensor, create a single endpoint to CIO2. Create power resource for enabling/disabling camera. BUG=b:111141128 Branch=None TEST=Testing on Atlas board Change-Id: Ide0e923bbc34f869dd0227c0a29977645bc5d58d Signed-off-by: Ping-Chung Chen <ping-chung.chen@intel.com> Signed-off-by: Rizwan Qureshi <rizwan.qureshi@intel.com> Reviewed-on: https://review.coreboot.org/27350 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Andy Yeh <andy.yeh@intel.com> Reviewed-by: Rajmohan Mani <rajmohan.mani@intel.com>
2018-07-03mb/google/*: Remove selection of DRIVERS_PS2_KEYBOARDFurquan Shaikh
Until now, chromeec was doing keyboard initialization for the boards that have DRIVERS_PS2_KEYBOARD selected. However, coreboot does not leave the keyboard controller in a default reset state. This could result in payloads or OS failing to probe the controller as there could be stale data buffered in the controller during the handoff. Since the boards using chromeec already perform keyboard initialization in payload, there is no need to initialize the keyboard in coreboot too. This change gets rid of DRIVERS_PS2_KEYBOARD selection from all google mainboards using chromeec. BUG=b:110024487 TEST=Keyboard works fine after booting to OS even if user hits keys during BIOS to OS handoff. Change-Id: I1f49b060eb005c0f2b86f9d68d6758954eeb3cf0 Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/27291 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-07-02mainboard/google/nocturne: Enable camera sensorsLijian Zhao
Sensors and CSI2 receiver configuration for Nocturne platform. IMX355 module has VCM, NVM and is on the second port of receiver. IMX319 module has NVM and is on the first port of receiver. Change-Id: I37c877df8062d5c79e25ed27775ab58e977555db Signed-off-by: Lijian Zhao <lijian.zhao@intel.com> Signed-off-by: Pratik Prajapati <pratikkumar.v.prajapati@intel.com> Signed-off-by: Chiranjeevi Rapolu <chiranjeevi.rapolu@intel.com> Signed-off-by: Rajmohan Mani <rajmohan.mani@intel.com> Signed-off-by: Tomasz Figa <tfiga@chromium.org> Reviewed-on: https://review.coreboot.org/26283 Reviewed-by: Furquan Shaikh <furquan@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-06-22mb/google/poppy/variants/nocturne: Hook up the SX9310 proximity sensor.Enrico Granata
Change-Id: I7358ee34df873098a86d692cc8a909b0ec5023a8 Signed-off-by: Enrico Granata <egranata@chromium.org> Reviewed-on: https://review.coreboot.org/27172 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
2018-06-07mb/google/poppy: Select right TPM interfaceNaresh G Solanki
TPM over SPI/I2C config selection got changed in https://review.coreboot.org/c/coreboot/+/24903 so this CL is fixing the same. BUG=None BRANCH=None TEST=Build for Soraka & make sure that TPM is probed over I2C interface rather than SPI. Change-Id: I077e4dc03520e26eb9f6404a7eb1edd99925de77 Signed-off-by: Naresh G Solanki <naresh.solanki@intel.com> Signed-off-by: Maulik V Vaghela <maulik.v.vaghela@intel.com> Reviewed-on: https://review.coreboot.org/26890 Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Martin Roth <martinroth@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-06-04security/tpm: Unify the coreboot TPM software stackPhilipp Deppenwiese
* Remove 2nd software stack in pc80 drivers directory. * Create TSPI interface for common usage. * Refactor TSS / TIS code base. * Add vendor tss (Cr50) directory. * Change kconfig options for TPM to TPM1. * Add user / board configuration with: * MAINBOARD_HAS_*_TPM # * BUS driver * MAINBOARD_HAS_TPM1 or MAINBOARD_HAS_TPM2 * Add kconfig TPM user selection (e.g. pluggable TPMs) * Fix existing headers and function calls. * Fix vboot for interface usage and antirollback mode. Change-Id: I7ec277e82a3c20c62a0548a1a2b013e6ce8f5b3f Signed-off-by: Philipp Deppenwiese <zaolin@das-labor.org> Reviewed-on: https://review.coreboot.org/24903 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2018-05-24mb/google/poppy: Enable SAR config on NamiAmanda Huang
This change enables SAR config on Nami with CHROMEOS option. BUG=b:75077304 BRANCH=master Change-Id: I8217333db2db6c0fd5e1c144dedd3692b1e1e6a3 Signed-off-by: Amanda Huang <amanda_hwang@compal.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/26490 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
2018-05-09mb/google/poppy/variants/nocturne: update Audio configurationSathyanarayana Nujella
This patch updates the below: 1) Nocturne board has only Max98373 speaker amp. Update both NHLT and DT entries to include only Max98373 and not include DA7219. 2) I2S2 is used for Boot Beep. So, update GPP_F0 ~ F2 pins accordingly. 3) Include DMIC-4ch configuration. BUG=b:79362472 TEST=None [Waiting for HW to verify] Change-Id: I0e9b3a564c22de6e84e96e5e937a3aca4ae73d75 Signed-off-by: Sathyanarayana Nujella <sathyanarayana.nujella@intel.com> Reviewed-on: https://review.coreboot.org/26143 Reviewed-by: Furquan Shaikh <furquan@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-05-09mb/google/poppy/variants/nami: Add support for getting OEM name from CBFSFurquan Shaikh
This change: 1. Allows mainboard to add OEM table to CBFS 2. Provides mainboard specific smbios_mainboard_manufacturer that reads OEM ID from EC using CBI and compares it against the OEM ID in CBFS table to identify the right OEM string. BUG=b:74617340 Change-Id: Iff54b12745de3efa7be0801c9a3a9f2a57767dde Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/26142 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2018-05-08mb/google/poppy/variants/atlas: update DMIC NHLT configurationSathyanarayana Nujella
From coreboot side, include DMIC 4ch NHLT configuration and its DMIC blob. In OS side, cras picks the needed channels using UCM's channel map configuration. So, this patch updates to include DMIC 4ch config. BUG=b:79158926 TEST=Verified 4-ch record with arecord TEST=Also verified internal mic record with cras using 'cras_test_client --capture_file dmic.raw --rate 48000 --num_channels 2 --duration 10' Change-Id: Ic6df00c2f26ad9cdf54152ab021c2b10499c429c Signed-off-by: Sathyanarayana Nujella <sathyanarayana.nujella@intel.com> Reviewed-on: https://review.coreboot.org/26019 Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-by: Lijian Zhao <lijian.zhao@intel.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-05-01mb/google/poppy: Add variant for nocturneNick Vaccaro
Add a new variant of poppy for the nocturne board. Key differences from baseboard include: - GPIO changes - devicetree.cb changes - memory stuffing option changes BUG=b:78122599 BRANCH=none TEST=./util/abuild/abuild -p none -t google/poppy -x -a Change-Id: I11c7829041b3c45407c17f71b08cc7fc17f717e8 Signed-off-by: Nick Vaccaro <nvaccaro@google.com> Reviewed-on: https://review.coreboot.org/25803 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
2018-03-30mb/google/poppy: Add variant for AtlasDuncan Laurie
Add a new variant of Poppy for the Atlas board. BUG=b:75454415 TEST=tested on a P0 board. System boots and is mostly functional, though some peripherals are not ready so there are no touchpad/touchscreen devices configured yet. Change-Id: I5a0bccd1bda0134aa51885ac2c6e7bb5b45de924 Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: https://review.coreboot.org/25389 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
2018-03-13mb/google/poppy/variants/nautilus: Enable SAR configsFurquan Shaikh
This change enables SAR configs when building with CHROMEOS option. BUG=b:74439919 Change-Id: I11a8fa04a77f688ed288780f2c605b8ac701f5a9 Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/25104 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2018-01-31mb/google/poppy/variants/nautilus: Add gpio-keys ACPI node for PENHFurquan Shaikh
This change uses gpio_keys driver to add ACPI node for pen eject event. BUG=b:71329519 TEST=Verified using evtest that pen eject event results in events as expected. Change-Id: Ib293c2ca532c8ed9e2587143b1a69300cd9fa4e9 Signed-off-by: Furquan Shaikh <furquan@chromium.org> Reviewed-on: https://review.coreboot.org/23238 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
2018-01-17mb/google/nautilus: Add MIPI camera asl files for IMX258 and DW9807Andy Yeh
* Add IMX258 sensor entity * Add DW9807 VCM control entity * Enable CIO2 and IMGu in devicetree.cb TEST: Verified the MIPI camera function on DUT board Change-Id: Iebd41ac3631829bbb0b008761eb67c3db3e94638 Signed-off-by: Andy Yeh <andy.yeh@intel.com> Signed-off-by: Rizwan Qureshi <rizwan.qureshi@intel.com> Reviewed-on: https://review.coreboot.org/23056 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Subrata Banik <subrata.banik@intel.com>
2017-12-20mb/google/poppy: Enable speaker and codec for namiGaggery Tsai
Nami uses MAX98357A speaker amplifier and DA7219 codec. This patch adds max98357a and da7219 under I2C #3 in devicetree and adds SPK DMIC nhlt support for 4CH DMIC. BUG=b:70646770 TEST=emerge-nami coreboot Change-Id: Iecf4059f8ea3d5e34f33f0be227897a8cca636fa Signed-off-by: Gaggery Tsai <gaggery.tsai@intel.com> Reviewed-on: https://review.coreboot.org/22861 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
2017-12-13mb/google/poppy/variants/nami: Disable native SD card controllerFurquan Shaikh
This change selects Kconfig option to disable native SD card controller in ACPI tables, since it is not used on nami. BUG=b:70160119 Change-Id: I6180c2b342c69e6a7c357f10b6297d67ea0211d7 Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/22825 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2017-12-11google/nautilus: Add Maxim98357a supportNaveen Manohar
Adds Maxim98357a support for Nautilus using the generic driver in drivers/generic/max98357 BUG=b:68686020 TEST=With entire merged audio should be enabled on max98357 speaker codec. Change-Id: I958bf7c1395259b3e3fb30332882fd51a48dc0cc Signed-off-by: Naveen Manohar <naveen.m@intel.com> Reviewed-on: https://review.coreboot.org/22458 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
2017-12-11mb/google/poppy/variants/nautilus: add SPK DMIC nhlt supportNaveen Manohar
Nautilus board uses max989357a speaker codec and 4CH DMIC. Select the appropriate NHLT blob to be packaged in CBFS. Also generate the required ACPI NHLT table for codec and the supported topology in nautilus. BUG=b:68686020 TEST=With the required driver support in kernel verify that the Audio plays on Speaker and captures on 4CH DMIC Change-Id: Ie90af02e0935029f53f9020bd78027b6eb31a187 Signed-off-by: Naveen Manohar <naveen.m@intel.com> Reviewed-on: https://review.coreboot.org/22457 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
2017-12-07mb/google/poppy/variants/nami: Add support for nami boardFurquan Shaikh
This change adds variant nami derived from baseboard poppy. BUG=b:70160119 Change-Id: Ic6795d49d3e6e98a32f4af0b621e8bb463041412 Signed-off-by: Furquan Shaikh <furquan@chromium.org> Reviewed-on: https://review.coreboot.org/22703 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2017-12-07boardid: Switch from Kconfig to weak functionsJulius Werner
This patch switches the board_id and ram_code helper framework to use weak functions rather than Kconfigs to determine whether the board supplies these IDs. This cuts down on the amount of boilerplate Kconfigs many boards have to set and also gives them more flexibility, such as being able to determine at runtime whether a given ID is present. Change-Id: I97d6d1103ebb2a2a7cf1ecfc45709c7e8c1a5cb0 Signed-off-by: Julius Werner <jwerner@chromium.org> Reviewed-on: https://review.coreboot.org/22695 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2017-12-06mb/google/poppy: Add config option for camera ACPI supportFurquan Shaikh
This change adds a new config option VARIANT_HAS_CAMERA_ACPI to allow variants to define ACPI tables for camera support. It also prevents boards that do not need this from unnecessarily providing dummy files for camera ACPI support. Change-Id: I91f8e407e0f021071eeadbde8c2695e2a6d69e06 Signed-off-by: Furquan Shaikh <furquan@chromium.org> Reviewed-on: https://review.coreboot.org/22702 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2017-12-06mb/google/poppy: Change POPPY_USE_* to VARIANT_HAS_*Furquan Shaikh
Change the prefix for TPM options from POPPY_USE_* to VARIANT_HAS_*. This makes it clear that these are variant specific options. Change-Id: I6fd120a34a5b0c1f018164d5c2b60548da1d0f61 Signed-off-by: Furquan Shaikh <furquan@chromium.org> Reviewed-on: https://review.coreboot.org/22701 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2017-12-06mb/google/poppy: Introduce VARIANT_SPECIFIC_OPTIONS_*Furquan Shaikh
In order to allow variants to select different Kconfig options, this change adds VARIANT_SPECIFIC_OPTIONS_${VARIANT_NAME} which can be selected by each variant in Kcnonfig.name. Change-Id: I15db2fdac5c9e55f9698c8a0c083d6467afae245 Signed-off-by: Furquan Shaikh <furquan@chromium.org> Reviewed-on: https://review.coreboot.org/22700 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2017-11-07mb/google/poppy/variants/nautilus: Enable Dialog DA7219 supportNaveen Manohar
Enable Dialog DA7219 codec i2c device and add required SSDT parameters BUG=b:68686020 TEST=With req'd driver support in kernel v4.4 verify audio on headset Change-Id: Ic815c929f29bec0d26a2981e9933b752c2d84c70 Signed-off-by: Naveen Manohar <naveen.m@intel.com> Signed-off-by: Shruthi Sudhakar <shruthi.sudhakar@intel.com> Reviewed-on: https://review.coreboot.org/22264 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
2017-11-07mb/google/poppy/variants/nautilus: add nhlt supportNaveen Manohar
Nautilus board uses Dialog da7219 headset codec, Select the appropriate NHLT blob to be packaged in CBFS. Also generate the required ACPI NHLT table for codec and the supported topology in nautilus. Removes unwanted DMIC blob pick for nautilus BUG=b:68686020 TEST=With the required driver support in kernel verify that the Audio plays on headset and recording on headset mic Change-Id: I104889f54da1de38854bcb72aabbc88b739d6c09 Signed-off-by: Naveen Manohar <naveen.m@intel.com> Reviewed-on: https://review.coreboot.org/22325 Reviewed-by: Furquan Shaikh <furquan@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2017-10-10mb/google/poppy/variants/nautilus: add nautilus boardChris Wang
Create Nautilus board which derives from Poppy, a KBL reference board. BRANCH=master BUG=b:66462881 TEST=Build (as initial setup) Change-Id: I6ca5ab821a7ba1746b37dfd3ea1ed367094d4f52 Signed-off-by: Chris Wang <chriswang@ami.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/21895 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
2017-09-26mb/google/*: Use newly added Chrome EC boardid functionFurquan Shaikh
Instead of duplicating code across multiple mainboards, use newly added helper function to read boardid from Chrome EC. Change-Id: I1671c0a0b87d0c4c45da5340e8f17a4a798317ca Signed-off-by: Furquan Shaikh <furquan@chromium.org> Reviewed-on: https://review.coreboot.org/21682 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2017-06-19mainboard/google/{poppy,soraka}: Remove MIPI camera support from devicetree.cbV Sowmya
Remove MIPI camera related register entries from devicetree.cb. BUG=b:38326541 BRANCH=none TEST=Build and boot poppy and soraka. Change-Id: Ic6a6a98d4c8ed6cba760eae5fd87bc2a3f15d7d2 Signed-off-by: V Sowmya <v.sowmya@intel.com> Reviewed-on: https://review.coreboot.org/19619 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
generated by cgit v1.2.3 (git 2.25.1) at 2024-07-19 07:52:50 +0000