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2020-03-07mb/google/volteer: add CNVi ASL entry for dynamic SSDT generationSrinidhi N Kaushik
This change uses drivers/intel/wifi chip for CNVi device and adds dynamic SSDT entires for CNVi also export wake gpio for CNVi. BUG=none BRANCH=none TEST=Build and boot volteer Signed-off-by: Srinidhi N Kaushik <srinidhi.n.kaushik@intel.com> Change-Id: Ia8baf1c7b770db23f31383bda46ae8d090468560 Reviewed-on: https://review.coreboot.org/c/coreboot/+/39333 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Nick Vaccaro <nvaccaro@google.com>
2020-03-07mb/google/volteer: add samsung-K4UBE3D4AA-MGCR SPDNick Vaccaro
Add samsung K4UBE3D4AA-MGCR SPD as memory sku id 1. BUG=b:148182234 BRANCH=none TEST=none Change-Id: Ie00c45de4d31856109cda13051a75cfa2c2548f7 Signed-off-by: Nick Vaccaro <nvaccaro@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/39336 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Caveh Jalali <caveh@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Furquan Shaikh <furquan@google.com>
2020-03-07chromeos: stop sharing write protect GPIO with depthchargeJoel Kitching
wpsw_boot is deprecated in favour of wpsw_cur. As such, coreboot no longer needs to share "write protect" GPIO with depthcharge. BUG=b:124141368, chromium:950273 TEST=make clean && make test-abuild BRANCH=none Change-Id: I2fcb7f82aa063fd72928171af5cbef0356ba620c Signed-off-by: Joel Kitching <kitching@google.com> Cq-Depend: chromium:2088434 Reviewed-on: https://review.coreboot.org/c/coreboot/+/39318 Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Julius Werner <jwerner@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-03-06mb/google/volteer: add new ripto variantNick Vaccaro
Add a new ripto variant based off of the volteer baseboard design. BUG=b:148385924, b:150810535 TEST="emerge-volteer coreboot chromeos-bootimage", flash ripto image and verify ripto boots to the kernel. Change-Id: If7606588147500a465f16c7846e2c8429ece93ec Signed-off-by: Nick Vaccaro <nvaccaro@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/39301 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: caveh jalali <caveh@chromium.org> Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Srinidhi N Kaushik <srinidhi.n.kaushik@intel.com>
2020-03-06mb/google/volteer: make variant_early_gpio_table weakNick Vaccaro
Declare variant_early_gpio_table() weak to allow override by variants. BUG=b:148385924, b:150810535 TEST=none Change-Id: Ife5e3b75256f71ecd763c4000fd2c7d7c927bb64 Signed-off-by: Nick Vaccaro <nvaccaro@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/39300 Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: caveh jalali <caveh@chromium.org> Reviewed-by: Srinidhi N Kaushik <srinidhi.n.kaushik@intel.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-03-04src/ec,mainboard: Move weak smbios_system_sku() override inwardsEdward O'Callaghan
Internalise smbios_system_sku() strong symbol inwards in the ec_skuid.c implementation and simply wrap a call to: google_chromeec_smbios_system_sku(). BUG=b:150735116 BRANCH=none TEST=none Change-Id: I05ebfc8126c0fb176ca52c307c658f50611ab6ab Signed-off-by: Edward O'Callaghan <quasisec@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/39146 Reviewed-by: Karthik Ramasubramanian <kramasub@google.com> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-03-02mb/**/dsdt.asl: Remove outdated sleepstates.asl commentAngel Pons
Previously, each Intel chipset had its own sleepstates.asl file. However, this is no longer the case, so drop these comments. This follows commit 408d1dac9e23250c0e485bbf934771f769b717c1. Change-Id: I0c0f4ad8bf743010ebdd2d53fcf297aeab64a662 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/39176 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
2020-03-02mb/**/dsdt.asl: Remove "Some generic macros" comment, againAngel Pons
It provides no useful information, so it might as well vanish. This follows commit 0142d441c63a9bb1a7955ea0ba764a2ddbc38d48. Change-Id: Iad41d8d39c6712cebfa5245f37bc69061b5ac552 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/39175 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
2020-02-28mainboard/google/volteer: Migrate onto SKU ID helpersEdward O'Callaghan
Leverage the common sku id space helper encoders. volteer uses the non-legacy SKU ID space. BUG=b:149348474 BRANCH=none TEST=only tested on hatch Change-Id: Ic66908afb7abb34527b4177cfd07f03ad718317c Signed-off-by: Edward O'Callaghan <quasisec@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/39037 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
2020-02-18volteer: allow empty SPD_SOURCESPaul Fagerburg
Some Volteer variants might not use SPD files. Allow SPD_SOURCES in spd/Makefile.inc to be empty. BUG=None BRANCH=None TEST=Build coreboot and see that it builds without error Signed-off-by: Paul Fagerburg <pfagerburg@google.com> Change-Id: I5a8231b999e16503867d3c8df571b11fa0c1f6a6 Reviewed-on: https://review.coreboot.org/c/coreboot/+/38902 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
2020-02-11mb/google/volteer: use new Tiger Lake memory configNick Vaccaro
Some of the common memory code that was being performed in mainboard has moved into the soc to reduce redundant code. This change adapts volteer to use Tiger Lake's new common code. BUG=b:145642089, b:145238504, b:145564831 BRANCH=none TEST="emerge-volteer coreboot chromeos-bootimage", flash and boot volteer, boot to kernel, "cat /proc/meminfo" and verify it reports "MemTotal: 8038196 kB". Change-Id: I32c9b8a040728d44565806eece6cf60b6b6073b6 Signed-off-by: Nick Vaccaro <nvaccaro@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/38715 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
2020-02-09mb/google/volteer: add volteer mainboard initial supportNick Vaccaro
Created a new Google baseboard named volteer from scratch. BUG=b:142961277 BRANCH=master TEST="emerge-volteer coreboot" compiles successfully. Change-Id: I03a13f3df4e819ab9cf63ad69867c807d2a1b651 Signed-off-by: Nick Vaccaro <nvaccaro@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/38620 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
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