coreboot - Some coreboot project code with my work

Age	Commit message (Expand)	Author
2020-06-25	mb/google/zork: Update ramstage GPIOs for v3 schematics for dalboz reference	Furquan Shaikh
2020-06-25	mb/google/zork: Update ramstage GPIOs for v3 schematics for trembyle reference	Furquan Shaikh
2020-06-25	mb/google/zork: Update _v3 romstage and wifi GPIO tables for dalboz	Furquan Shaikh
2020-06-25	mb/google/zork: Update _v3 romstage and wifi GPIO tables for trembyle	Furquan Shaikh
2020-06-25	mb/google/zork: Prepare variants for v3 schematics	Furquan Shaikh
2020-06-25	mb/google/zork: Drop RAM_ID configuration from romstage gpio table	Furquan Shaikh
2020-06-25	mb/google/zork: Move variant_early_gpio_table to gpio_baseboard_common.c	Furquan Shaikh
2020-06-24	mb/google/zork: Add UPD xhci0_force_gen1 for Trembyle and Ezkinil	Lucas Chen
2020-06-23	mb/google/zork: Add support for fingerprint device	Furquan Shaikh
2020-06-19	mb/google/zork: Disable UART 1, 2 and 3	Raul E Rangel
2020-06-13	mb/google/zork: update DRAM SPD table for vilboz	Paul Ma
2020-06-11	vc/amd/fsp/platform_descriptors: drop prefix from PCIe/DDI structs	Felix Held
2020-06-04	mb/google/zork: create new variant for Vilboz	Peichao Wang
2020-06-03	mb/google/zork: Add HID for max98357a	Raul E Rangel
2020-06-03	mb/google/zork: Delete sb_fch.asl	Raul E Rangel
2020-05-28	mb/google/zork/berknip: Replace full GPL header with SPDX line	Patrick Georgi
2020-05-27	mb/google/zork: Add Picasso based Zork mainboard and variants	Raul E Rangel