coreboot - Some coreboot project code with my work

Age	Commit message (Expand)	Author
2020-06-20	mb/google/zork: rename fch_apic_routing struct to fch_irq_routing	Felix Held
2020-06-20	mb/google/zork: remove redundant IRQ routing configuration	Felix Held
2020-06-19	soc/amd: move acpi_wake_source.asl to common directory	Felix Held
2020-06-19	mb/google/zork: Disable UART 1, 2 and 3	Raul E Rangel
2020-06-19	Kconfig: Escape variable to accommodate new Kconfig versions	Patrick Georgi
2020-06-19	mb///Kconfig: guard board name in quotes	Patrick Georgi
2020-06-17	soc/amd/picasso: rename PICASSO_UART Kconfig option	Felix Held
2020-06-14	mb/google/zork: Drop OEM_BIN configs	Furquan Shaikh
2020-06-14	mb/google/zork: Enable ELOG options	Furquan Shaikh
2020-06-13	treewide: Add Kconfig variable MEMLAYOUT_LD_FILE	Furquan Shaikh
2020-06-13	mb/google/zork: update DRAM SPD table for vilboz	Paul Ma
2020-06-11	vc/amd/fsp/platform_descriptors: drop prefix from PCIe/DDI structs	Felix Held
2020-06-10	mb/google/zork: Set FMDFILE for zork family	Furquan Shaikh
2020-06-04	Revert "mb/google/zork: Increase RO section to 5MB"	Raul E Rangel
2020-06-04	mb/google/zork: create new variant for Vilboz	Peichao Wang
2020-06-03	mb/google/zork: Add HID for max98357a	Raul E Rangel
2020-06-03	mb/google/zork: Delete sb_fch.asl	Raul E Rangel
2020-05-28	mb/google/zork/berknip: Replace full GPL header with SPDX line	Patrick Georgi
2020-05-27	mb/google/zork: Add Picasso based Zork mainboard and variants	Raul E Rangel