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path: root/src/mainboard/intel/adlrvp/variants
AgeCommit message (Expand)Author
2020-11-09mb/intel/adlrvp: Add PMC.MUX.CONx device configuration for adlrvpV Sowmya
2020-11-08mb/intel/adlrvp: Refactor ADLRVP code to get rid of 'variants/baseboard'Subrata Banik
2020-11-07mb/intel/adlrvp: Configure GPIOs to enable DMICSridhar Siricilla
2020-11-07mb/intel: Enable ALC711 Audio codec over SNDW0 linkSridhar Siricilla
2020-11-07mb/intel/adlrvp: Enable TCSS xDCI, TBT PCIe RP and DMA controllersV Sowmya
2020-11-07mb/intel/adlrvp: Configure the HPD GPIO'sV Sowmya
2020-11-05mb/intel/adlrvp: Add support for DDR5 memorySubrata Banik
2020-11-02mb, soc/intel: Reorganize CNVi device entries in devicetreeFurquan Shaikh
2020-10-29mb/intel/adlrvp: Add dq_pins_interleaved into 'struct mb_cfg'Subrata Banik
2020-10-26mb/*,soc/intel: drop the obsolete dt option `speed_shift_enable`Michael Niewöhner
2020-10-16mb/intel/adlrvp: Enable Hybrid storage modeSubrata Banik
2020-10-16mb/intel/adlrvp: Enable PCIE RP11 for optaneSubrata Banik
2020-10-16mb/intel/adlrvp: Fix SSD detection issue on ADL RVPSubrata Banik
2020-10-16mb/intel/adlrvp: Program GPIO for M.2 PCH SSDSubrata Banik
2020-10-14mb/intel/adlrvp: Add ADL-P ramstage mainboard codeSubrata Banik
2020-10-13mb, soc/intel: Switch to using drivers/wifi/generic for Intel WiFi devicesFurquan Shaikh
2020-10-11mb/intel/adlrvp: Add ADL-P romstage mainboard codeSubrata Banik
2020-10-08mb/intel/adlrvp: Add initial ADL-P mainboard codeSubrata Banik