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Some coreboot project code with my work
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intel
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cougar_canyon2
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romstage.c
Age
Commit message (
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Author
2018-08-13
src/mb: Remove some unneeded includes
Elyes HAOUAS
2018-06-09
mainboard: Get rid of device_t
Elyes HAOUAS
2017-07-06
mainboard/[g-l]: add IS_ENABLED() around Kconfig symbol references
Martin Roth
2017-01-12
fsp 1.0 systems: Check for NULL when saving HobListPtr
Martin Roth
2016-06-29
intel romstage: Use run_ramstage()
Kyösti Mälkki
2015-10-31
tree: drop last paragraph of GPL copyright header
Patrick Georgi
2015-10-22
Revert "Remove sandybridge and ivybridge FSP code path"
Martin Roth
2015-10-03
Remove sandybridge and ivybridge FSP code path
Alexandru Gagniuc
2015-09-24
coreboot: move TS_END_ROMSTAGE to one spot
Aaron Durbin
2015-05-21
Remove address from GPLv2 headers
Patrick Georgi
2015-02-09
Intel FSP platforms: Fix timestamps
Kyösti Mälkki
2015-01-06
mainboard/*/romstage.c: Sanitize system header inclusions
Edward O'Callaghan
2015-01-05
timestamps: Switch from tsc_t to uint64_t
Stefan Reinauer
2015-01-04
mainboard: Sanitize some superio include paths to be non-local
Edward O'Callaghan
2014-12-16
CBMEM console: Fix boards with BROKEN_CAR_MIGRATE
Kyösti Mälkki
2014-12-09
fsp platfoms: add prototype & consolidate main entry-point
Martin Roth
2014-11-30
Replace hlt() loops with halt()
Patrick Georgi
2014-11-20
mainboard/intel/cougar_canyon2/romstage.c: Missing prototype
Edward O'Callaghan
2014-07-08
mainboard: Trivial - drop trailing blank lines at EOF
Edward O'Callaghan
2014-06-18
mainboard: Clear up remaining SIO_PORT from Kconfig
Edward O'Callaghan
2014-05-09
cougar_canyon2: Switch CPU/NB/SB to the shared FSP code
Martin Roth
2014-01-22
CBMEM: Replace cbmem_initialize() with cbmem_recovery()
Kyösti Mälkki
2013-12-04
intel/cougar_canyon2: Intel CRB FSP based mainboard
Marc Jones