index
:
coreboot
2560p
820g2
autoport-hsw
broadwell_refcode
e6230
e7240_bdw
haswell-mrc
hp820g1
hp9480m
mec1322
Some coreboot project code with my work
vimacs
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
src
/
mainboard
/
intel
/
emeraldlake2
Age
Commit message (
Expand
)
Author
2013-07-31
Drop unused EXTERNAL_MRC_BLOB
Stefan Reinauer
2013-07-04
intel/sandybridge intel/ivybridge: Use MMCONF_SUPPORT_DEFAULT
Kyösti Mälkki
2013-03-22
Unify coreboot table generation
Stefan Reinauer
2013-03-22
x86: Unify arch/io.h and arch/romcc_io.h
Stefan Reinauer
2013-02-28
CBMEM: always initialize early if the board supports it
Stefan Reinauer
2013-02-27
Mainboard SMI S state handler was using the wrong defines
Marc Jones
2013-02-14
sconfig: rename lapic_cluster -> cpu_cluster
Stefan Reinauer
2013-02-14
sconfig: rename pci_domain -> domain
Stefan Reinauer
2013-02-04
Intel based boards: Use tab instead of spaces to align comment in DSDT
Paul Menzel
2013-01-03
Rename mainboard_smi.c to smihandler.c
Patrick Georgi
2012-11-24
Remove duplicate VGA BIOS interrupt handlers
Patrick Georgi
2012-11-24
yabel: Use X86_* instead of the more verbose M.x86.REG_*
Patrick Georgi
2012-11-24
x86 realmode: Use x86emu register file + defines
Patrick Georgi
2012-11-24
x86 realmode: Adapt to x86emu/YABEL style return codes
Patrick Georgi
2012-11-16
Drop unneeded BOARD_HAS_FADT option
Stefan Reinauer
2012-11-16
Reduce number of per-mainboard changes
Stefan Reinauer
2012-11-14
Move HAVE_SMI_HANDLER from mainboards to chipsets
Stefan Reinauer
2012-11-14
SMM: Save the GNVS pointer when creating APCI tables
Duncan Laurie
2012-11-14
SMM: Avoid use of global variables in SMI handler
Duncan Laurie
2012-11-13
Make EmeraldLake2 work again
Duncan Laurie
2012-11-12
ACPI: Zero pstate/cstate control values in FADT
Duncan Laurie
2012-11-06
Drop redundant CHIP_NAME in mainboard.c
Kyösti Mälkki
2012-10-08
hpet: common ACPI generation
Patrick Georgi
2012-10-05
Use mainboard_interrupt_handlers everywhere
Patrick Georgi
2012-08-08
Cleanup coreboot memory table includes
Kyösti Mälkki
2012-08-08
Drop HAVE_MAINBOARD_RESOURCES
Kyösti Mälkki
2012-08-01
Intel and GFXUMA: drop redundant use of lb_add_memory_range()
Kyösti Mälkki
2012-07-26
Drop mainboard chip.h
Stefan Reinauer
2012-07-24
ChromeOS: Remove board specific acpi_get_vdat_info()
Stefan Reinauer
2012-07-24
Drop (empty) sandybridge_late_initialization()
Stefan Reinauer
2012-07-24
Remove CMOS Extended range enable from romstage
Duncan Laurie
2012-07-24
Move GGL0001 ACPI code to generic ChromeOS code
Stefan Reinauer
2012-05-26
Move subsystem IDs to devicetree.cb
Stefan Reinauer
2012-05-03
Don't pre-enable SATA AHCI in romstage.c
Stefan Reinauer
2012-05-02
ChromeOS: drop unused debug header description
Stefan Reinauer
2012-05-01
Drop CONFIG_MAX_PHYSICAL_CPUS on non-AMD boards
Stefan Reinauer
2012-05-01
Clean up Emerald Lake 2 mainboard directory
Gabe Black
2012-05-01
Allow more CPU cores on Emerald Lake 2 CRB
Stefan Reinauer
2012-05-01
Set up ChromeOS dev mode, recovery, and write protect GPIOs on Emerald Lake 2.
Gabe Black
2012-05-01
Fix Sandybridge/Ivybridge mainboards according to code review
Stefan Reinauer
2012-05-01
Set up the Emerald Lake 2 SMI and SCI sources based on the schematic.
Gabe Black
2012-04-30
Add support for Intel Emerald Lake 2 CRB
Stefan Reinauer