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Some coreboot project code with my work
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Kconfig
Age
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Author
2019-07-08
intel/fsp_baytrail: Move TSC_MONOTONIC_TIMER
Kyösti Mälkki
2018-11-28
mb/*/*/Kconfig: Remove useless comment
Elyes HAOUAS
2018-05-31
cpu/x86/mtrr: Get rid of CACHE_ROM_SIZE_OVERRIDE
Nico Huber
2016-07-13
FSP1_0 does not support HAVE_ACPI_RESUME
Kyösti Mälkki
2015-10-31
tree: drop last paragraph of GPL copyright header
Patrick Georgi
2015-10-06
fsp/cache_as_ram.inc and boards: Fix incorrect usage of POST_IO
Alexandru Gagniuc
2015-09-07
intel: Do not hardcode the position of mrc.cache
Alexandru Gagniuc
2015-07-02
Move baytrail & fsp_baytrail to the common IFD interface.
Martin Roth
2015-06-27
Kconfig: Remove unnecessary and incorrect MRC_CACHE symbols
Martin Roth
2015-05-21
Remove address from GPLv2 headers
Patrick Georgi
2015-03-05
mainboard: Do not redefine DRIVERS_PS2_KEYBOARD Kconfig variable
Alexandru Gagniuc
2015-02-24
mainboard: Do not redefine CONSOLE_POST Kconfig variable
Alexandru Gagniuc
2014-12-17
intel/minnowmax: Determine board type from GPIOs
Martin Roth
2014-12-06
Remove IRQ_SLOT_COUNT on all boards without PIRQ table.
Vladimir Serbinenko
2014-12-05
minnowmax board: Update Kconfig
Martin Roth
2014-12-01
Mark non-executable files non-executable
Patrick Georgi
2014-11-29
mainboard/intel/minnowmax: use Baytrail Gold3 FSP
York Yang
2014-09-29
intel/minnowmax: Enable S3 suspend/resume
Mohan D'Costa
2014-08-11
mainboard/intel/minnowmax: Add MinnowMax mainboard
Martin Roth