coreboot - Some coreboot project code with my work

Age	Commit message (Expand)	Author
2021-01-21	mb/intel/adlrvp: Add PRESERVE to UNIFIED_MRC_CACHE	Subrata Banik
2021-01-21	mb/intel/adlrvp: Remove redundant HAS_RECOVERY_MRC_CACHE Kconfig	Subrata Banik
2021-01-20	mainboards: Drop GNVS cmap and cmbp	Kyösti Mälkki
2021-01-20	ACPI GNVS: Drop APIC, factor out MPEN	Kyösti Mälkki
2021-01-19	mb/intel/strago: Disable Chrome EC build	Patrick Georgi
2021-01-18	ACPI: Select ACPI_SOC_NVS only where suitable	Kyösti Mälkki
2021-01-15	cpu/intel/haswell: Factor out ACPI C-state values	Angel Pons
2021-01-15	mb/intel/baskingridge: Replace invalid C-state values	Angel Pons
2021-01-11	{soc,vc,mb}/intel: Drop support for Cannon Lake SoC	Felix Singer
2021-01-10	mb/intel/adlrvp: Update GPIOs as per latest schematics	Subrata Banik
2021-01-10	mb/intel/adlrvp: Fix FW download failed for PEG 060, 010	Subrata Banik
2021-01-10	soc/intel/alderlake: Refactor SoC code to maintain CPU and PCH PCIE RPs	Subrata Banik
2021-01-10	soc/intel: Replace acpi_init_gnvs()	Kyösti Mälkki
2021-01-10	mb/x/acpi_tables: Rename to mainboard_fill_gnvs()	Kyösti Mälkki
2021-01-10	mb/x/acpi_tables: Move EC_RW detection	Kyösti Mälkki
2021-01-08	pineview boards: Drop MAINBOARD_HAS_NATIVE_VGA_INIT	Angel Pons
2021-01-07	mb/intel/jasperlake_rvp: Fix building with CONFIG_CHROMEOS unset	Matt DeVillier
2021-01-07	mb/intel/adlrvp: Fix building with CONFIG_CHROMEOS unset	Matt DeVillier
2021-01-06	soc/intel/broadwell: Move MAX_CPUS from mb to SoC	Felix Singer
2021-01-06	soc/intel/skylake: Move MAX_CPUS from mb to SoC	Felix Singer
2021-01-06	mb/intel/wtm2/Kconfig: Limit MAX_CPUS to 8	Angel Pons
2021-01-06	cpu/intel/model_206ax: Rename `cX_acpower` options	Angel Pons
2021-01-06	cpu/intel/model_206ax: Unify ACPI C-state options	Angel Pons
2020-12-23	mb/intel/adlrvp: Make SI_ALL region within 16MiB	Subrata Banik
2020-12-21	mb/intel/shadowmountain: Add Intel Pre-CEP shadowmountain board	V Sowmya
2020-12-17	mb/intel/coffeelake_rvp: Stop using headers for HDA verbs	Angel Pons
2020-12-17	mb/intel/adlrvp: Enable PCIEXP_HOTPLUG for TCSS TBT/USB4 ports	V Sowmya
2020-12-14	mb/intel/tglrvp: Enable CNVi Bluetooth for UP4	Bora Guvendik
2020-12-14	soc/intel/braswell: Clean up devicetree settings	Angel Pons
2020-12-14	soc/intel/skylake: Drop always-zero PowerLimit4 dt setting	Angel Pons
2020-12-14	mb/intel/ehlcrb: Remove unrelated Kconfig settings	Tan, Lean Sheng
2020-12-12	mb/intel/adlrvp: Make CLKSRC and CLKREQ proper for PCIE RP8	Subrata Banik
2020-12-10	mb/intel/ehlcrb: Add EHL CRB memory initialization support	Tan, Lean Sheng
2020-12-10	mb/intel/ehlcrb: Update ehl_crb device tree	Tan, Lean Sheng
2020-12-10	mb/intel/ehlcrb: Remove JSL sku id info in SMBIOS	Tan, Lean Sheng
2020-12-10	mb/intel/ehlcrb: Remove IPU & MIPI related support from EHL CRB	Tan, Lean Sheng
2020-12-10	mb/intel/ehlcrb: Remove board ID detection via EC	Tan, Lean Sheng
2020-12-10	mb/intel/ehlcrb: Remove ChromeOS EC related headers	Tan, Lean Sheng
2020-12-10	mb/intel/ehlcrb: Remove ChromeOS EC support from smihandler	Tan, Lean Sheng
2020-12-10	mb/intel/ehlcrb: Remove ChromeOS support from mainboard	Tan, Lean Sheng
2020-12-10	mb/intel/ehlcrb: Add missing 'include <console/console.h>'	Tan, Lean Sheng
2020-12-10	mb/intel/ehlcrb: Add initial mainboard code	Tan, Lean Sheng
2020-12-09	mb/intel/adlrvp: Add PMC.MUX.CONx device config for Conn2	V Sowmya
2020-12-08	mb/intel/tglrvp: Restrict SI_ME region to lower 16MiB	Furquan Shaikh
2020-12-07	mb/intel/adlrvp: Remove GPP_E0	Meera Ravindranath
2020-12-06	mb/*: Remove unnecessary selects	Felix Singer
2020-12-02	cbfs: Simplify load/map API names, remove type arguments	Julius Werner
2020-12-02	mb/intel/adlrvp: Replace tab by white space in devicetree	Meera Ravindranath
2020-12-01	mb/intel/jslrvp: Modify the flash layout for fsp debug build	V Sowmya
2020-12-01	mb/intel/adlrvp: Remove unused EC_SYNC_IRQ GPIO on ADLRVP	Subrata Banik